| 1 | /*
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| 2 | pci.h
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| 3 |
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| 4 | Created: Jan 2000 by Philip Homburg <philip@cs.vu.nl>
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| 5 | */
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| 6 |
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| 7 | /* tempory functions: to be replaced later (see pci_intel.h) */
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| 8 | _PROTOTYPE( unsigned pci_inb, (U16_t port) );
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| 9 | _PROTOTYPE( unsigned pci_inw, (U16_t port) );
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| 10 | _PROTOTYPE( unsigned pci_inl, (U16_t port) );
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| 11 |
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| 12 | _PROTOTYPE( void pci_outb, (U16_t port, U8_t value) );
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| 13 | _PROTOTYPE( void pci_outw, (U16_t port, U16_t value) );
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| 14 | _PROTOTYPE( void pci_outl, (U16_t port, U32_t value) );
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| 15 |
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| 16 | /* pci.c */
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| 17 | _PROTOTYPE( void pci_init, (void) );
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| 18 | _PROTOTYPE( int pci_find_dev, (U8_t bus, U8_t dev, U8_t func,
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| 19 | int *devindp) );
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| 20 | _PROTOTYPE( int pci_first_dev, (int *devindp, u16_t *vidp, u16_t *didp) );
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| 21 | _PROTOTYPE( int pci_next_dev, (int *devindp, u16_t *vidp, u16_t *didp) );
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| 22 | _PROTOTYPE( void pci_reserve, (int devind) );
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| 23 | _PROTOTYPE( void pci_ids, (int devind, u16_t *vidp, u16_t *didp) );
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| 24 | _PROTOTYPE( char *pci_slot_name, (int devind) );
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| 25 | _PROTOTYPE( char *pci_dev_name, (U16_t vid, U16_t did) );
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| 26 | _PROTOTYPE( u8_t pci_attr_r8, (int devind, int port) );
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| 27 | _PROTOTYPE( u16_t pci_attr_r16, (int devind, int port) );
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| 28 | _PROTOTYPE( u32_t pci_attr_r32, (int devind, int port) );
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| 29 | _PROTOTYPE( void pci_attr_w16, (int devind, int port, U16_t value) );
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| 30 | _PROTOTYPE( void pci_attr_w32, (int devind, int port, u32_t value) );
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| 31 |
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| 32 | #define PCI_VID 0x00 /* Vendor ID, 16-bit */
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| 33 | #define PCI_DID 0x02 /* Device ID, 16-bit */
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| 34 | #define PCI_CR 0x04 /* Command Register, 16-bit */
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| 35 | #define PCI_PCISTS 0x06 /* PCI status, 16-bit */
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| 36 | #define PSR_SSE 0x4000 /* Signaled System Error */
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| 37 | #define PSR_RMAS 0x2000 /* Received Master Abort Status */
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| 38 | #define PSR_RTAS 0x1000 /* Received Target Abort Status */
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| 39 | #define PCI_REV 0x08 /* Revision ID */
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| 40 | #define PCI_PIFR 0x09 /* Prog. Interface Register */
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| 41 | #define PCI_SCR 0x0A /* Sub-Class Register */
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| 42 | #define PCI_BCR 0x0B /* Base-Class Register */
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| 43 | #define PCI_HEADT 0x0E /* Header type, 8-bit */
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| 44 | #define PHT_MULTIFUNC 0x80 /* Multiple functions */
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| 45 | #define PCI_BAR 0x10 /* Base Address Register */
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| 46 | #define PCI_BAR_2 0x14 /* Base Address Register */
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| 47 | #define PCI_BAR_3 0x18 /* Base Address Register */
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| 48 | #define PCI_BAR_4 0x1C /* Base Address Register */
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| 49 | #define PCI_ILR 0x3C /* Interrupt Line Register */
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| 50 | #define PCI_IPR 0x3D /* Interrupt Pin Register */
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| 51 |
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| 52 | /* Device type values as ([PCI_BCR] << 16) | ([PCI_SCR] << 8) | [PCI_PIFR] */
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| 53 | #define PCI_T3_PCI2PCI 0x060400 /* PCI-to-PCI Bridge device */
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| 54 | #define PCI_T3_PCI2PCI_SUBTR 0x060401 /* Subtr. PCI-to-PCI Bridge */
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| 55 |
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| 56 | /* PCI bridge devices (AGP) */
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| 57 | #define PPB_SBUSN 0x19 /* Secondary Bus Number */
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| 58 |
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| 59 | /* Intel compatible PCI bridge devices (AGP) */
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| 60 | #define PPB_SSTS 0x1E /* Secondary PCI-to-PCI Status Register */
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| 61 |
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| 62 | #define NO_VID 0xffff /* No PCI card present */
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| 63 |
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| 64 | struct pci_vendor
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| 65 | {
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| 66 | u16_t vid;
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| 67 | char *name;
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| 68 | };
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| 69 |
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| 70 | struct pci_device
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| 71 | {
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| 72 | u16_t vid;
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| 73 | u16_t did;
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| 74 | char *name;
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| 75 | };
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| 76 |
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| 77 | struct pci_baseclass
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| 78 | {
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| 79 | u8_t baseclass;
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| 80 | char *name;
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| 81 | };
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| 82 |
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| 83 | struct pci_subclass
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| 84 | {
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| 85 | u8_t baseclass;
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| 86 | u8_t subclass;
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| 87 | u16_t infclass;
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| 88 | char *name;
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| 89 | };
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| 90 |
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| 91 | struct pci_intel_ctrl
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| 92 | {
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| 93 | u16_t vid;
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| 94 | u16_t did;
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| 95 | };
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| 96 |
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| 97 | struct pci_isabridge
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| 98 | {
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| 99 | u16_t vid;
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| 100 | u16_t did;
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| 101 | int checkclass;
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| 102 | int type;
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| 103 | };
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| 104 |
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| 105 | struct pci_pcibridge
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| 106 | {
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| 107 | u16_t vid;
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| 108 | u16_t did;
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| 109 | int type;
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| 110 | };
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| 111 |
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| 112 | #define PCI_IB_PIIX 1 /* Intel PIIX compatible ISA bridge */
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| 113 | #define PCI_IB_VIA 2 /* VIA compatible ISA bridge */
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| 114 | #define PCI_IB_AMD 3 /* AMD compatible ISA bridge */
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| 115 | #define PCI_IB_SIS 4 /* SIS compatible ISA bridge */
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| 116 |
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| 117 | #define PCI_PCIB_INTEL 1 /* Intel compatible PCI bridge */
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| 118 | #define PCI_AGPB_INTEL 2 /* Intel compatible AGP bridge */
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| 119 | #define PCI_AGPB_VIA 3 /* VIA compatible AGP bridge */
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| 120 |
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| 121 | extern struct pci_vendor pci_vendor_table[];
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| 122 | extern struct pci_device pci_device_table[];
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| 123 | extern struct pci_baseclass pci_baseclass_table[];
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| 124 | extern struct pci_subclass pci_subclass_table[];
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| 125 | extern struct pci_intel_ctrl pci_intel_ctrl[];
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| 126 | extern struct pci_isabridge pci_isabridge[];
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| 127 | extern struct pci_pcibridge pci_pcibridge[];
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| 128 |
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| 129 | /*
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| 130 | * $PchId: pci.h,v 1.4 2001/12/06 20:21:22 philip Exp $
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| 131 | */
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