source: trunk/minix/drivers/at_wini/at_wini.c@ 20

Last change on this file since 20 was 9, checked in by Mattia Monga, 14 years ago

Minix 3.1.2a
File size: 73.2 KB
RevLine 
[9]1/* This file contains the device dependent part of a driver for the IBM-AT
2 * winchester controller. Written by Adri Koppes.
3 *
4 * The file contains one entry point:
5 *
6 * at_winchester_task: main entry when system is brought up
7 *
8 * Changes:
9 * Aug 19, 2005 ATA PCI support, supports SATA (Ben Gras)
10 * Nov 18, 2004 moved AT disk driver to user-space (Jorrit N. Herder)
11 * Aug 20, 2004 watchdogs replaced by sync alarms (Jorrit N. Herder)
12 * Mar 23, 2000 added ATAPI CDROM support (Michael Temari)
13 * May 14, 2000 d-d/i rewrite (Kees J. Bot)
14 * Apr 13, 1992 device dependent/independent split (Kees J. Bot)
15 */
16
17#include "at_wini.h"
18
19#include <minix/sysutil.h>
20#include <minix/keymap.h>
21#include <sys/ioc_disk.h>
22#include <ibm/pci.h>
23
24#define ATAPI_DEBUG 0 /* To debug ATAPI code. */
25
26/* I/O Ports used by winchester disk controllers. */
27
28/* Read and write registers */
29#define REG_CMD_BASE0 0x1F0 /* command base register of controller 0 */
30#define REG_CMD_BASE1 0x170 /* command base register of controller 1 */
31#define REG_CTL_BASE0 0x3F6 /* control base register of controller 0 */
32#define REG_CTL_BASE1 0x376 /* control base register of controller 1 */
33
34#define PCI_CTL_OFF 2 /* Offset of control registers from BAR2 */
35#define PCI_DMA_2ND_OFF 8 /* Offset of DMA registers from BAR4 for
36 * secondary channel
37 */
38
39#define REG_DATA 0 /* data register (offset from the base reg.) */
40#define REG_PRECOMP 1 /* start of write precompensation */
41#define REG_COUNT 2 /* sectors to transfer */
42#define REG_SECTOR 3 /* sector number */
43#define REG_CYL_LO 4 /* low byte of cylinder number */
44#define REG_CYL_HI 5 /* high byte of cylinder number */
45#define REG_LDH 6 /* lba, drive and head */
46#define LDH_DEFAULT 0xA0 /* ECC enable, 512 bytes per sector */
47#define LDH_LBA 0x40 /* Use LBA addressing */
48#define LDH_DEV 0x10 /* Drive 1 iff set */
49#define ldh_init(drive) (LDH_DEFAULT | ((drive) << 4))
50
51/* Read only registers */
52#define REG_STATUS 7 /* status */
53#define STATUS_BSY 0x80 /* controller busy */
54#define STATUS_RDY 0x40 /* drive ready */
55#define STATUS_WF 0x20 /* write fault */
56#define STATUS_SC 0x10 /* seek complete (obsolete) */
57#define STATUS_DRQ 0x08 /* data transfer request */
58#define STATUS_CRD 0x04 /* corrected data */
59#define STATUS_IDX 0x02 /* index pulse */
60#define STATUS_ERR 0x01 /* error */
61#define STATUS_ADMBSY 0x100 /* administratively busy (software) */
62#define REG_ERROR 1 /* error code */
63#define ERROR_BB 0x80 /* bad block */
64#define ERROR_ECC 0x40 /* bad ecc bytes */
65#define ERROR_ID 0x10 /* id not found */
66#define ERROR_AC 0x04 /* aborted command */
67#define ERROR_TK 0x02 /* track zero error */
68#define ERROR_DM 0x01 /* no data address mark */
69
70/* Write only registers */
71#define REG_COMMAND 7 /* command */
72#define CMD_IDLE 0x00 /* for w_command: drive idle */
73#define CMD_RECALIBRATE 0x10 /* recalibrate drive */
74#define CMD_READ 0x20 /* read data */
75#define CMD_READ_EXT 0x24 /* read data (LBA48 addressed) */
76#define CMD_READ_DMA_EXT 0x25 /* read data using DMA (w/ LBA48) */
77#define CMD_WRITE 0x30 /* write data */
78#define CMD_WRITE_EXT 0x34 /* write data (LBA48 addressed) */
79#define CMD_WRITE_DMA_EXT 0x35 /* write data using DMA (w/ LBA48) */
80#define CMD_READVERIFY 0x40 /* read verify */
81#define CMD_FORMAT 0x50 /* format track */
82#define CMD_SEEK 0x70 /* seek cylinder */
83#define CMD_DIAG 0x90 /* execute device diagnostics */
84#define CMD_SPECIFY 0x91 /* specify parameters */
85#define CMD_READ_DMA 0xC8 /* read data using DMA */
86#define CMD_WRITE_DMA 0xCA /* write data using DMA */
87#define ATA_IDENTIFY 0xEC /* identify drive */
88/* #define REG_CTL 0x206 */ /* control register */
89#define REG_CTL 0 /* control register */
90#define CTL_NORETRY 0x80 /* disable access retry */
91#define CTL_NOECC 0x40 /* disable ecc retry */
92#define CTL_EIGHTHEADS 0x08 /* more than eight heads */
93#define CTL_RESET 0x04 /* reset controller */
94#define CTL_INTDISABLE 0x02 /* disable interrupts */
95#define REG_CTL_ALTSTAT 0 /* alternate status register */
96
97/* Identify words */
98#define ID_GENERAL 0x00 /* General configuration information */
99#define ID_GEN_NOT_ATA 0x8000 /* Not an ATA device */
100#define ID_CAPABILITIES 0x31 /* Capabilities (49)*/
101#define ID_CAP_LBA 0x0200 /* LBA supported */
102#define ID_CAP_DMA 0x0100 /* DMA supported */
103#define ID_FIELD_VALIDITY 0x35 /* Field Validity (53) */
104#define ID_FV_88 0x04 /* Word 88 is valid (UDMA) */
105#define ID_MULTIWORD_DMA 0x3f /* Multiword DMA (63) */
106#define ID_MWDMA_2_SEL 0x0400 /* Mode 2 is selected */
107#define ID_MWDMA_1_SEL 0x0200 /* Mode 1 is selected */
108#define ID_MWDMA_0_SEL 0x0100 /* Mode 0 is selected */
109#define ID_MWDMA_2_SUP 0x0004 /* Mode 2 is supported */
110#define ID_MWDMA_1_SUP 0x0002 /* Mode 1 is supported */
111#define ID_MWDMA_0_SUP 0x0001 /* Mode 0 is supported */
112#define ID_CSS 0x53 /* Command Sets Supported (83) */
113#define ID_CSS_LBA48 0x0400
114#define ID_ULTRA_DMA 0x58 /* Ultra DMA (88) */
115#define ID_UDMA_5_SEL 0x2000 /* Mode 5 is selected */
116#define ID_UDMA_4_SEL 0x1000 /* Mode 4 is selected */
117#define ID_UDMA_3_SEL 0x0800 /* Mode 3 is selected */
118#define ID_UDMA_2_SEL 0x0400 /* Mode 2 is selected */
119#define ID_UDMA_1_SEL 0x0200 /* Mode 1 is selected */
120#define ID_UDMA_0_SEL 0x0100 /* Mode 0 is selected */
121#define ID_UDMA_5_SUP 0x0020 /* Mode 5 is supported */
122#define ID_UDMA_4_SUP 0x0010 /* Mode 4 is supported */
123#define ID_UDMA_3_SUP 0x0008 /* Mode 3 is supported */
124#define ID_UDMA_2_SUP 0x0004 /* Mode 2 is supported */
125#define ID_UDMA_1_SUP 0x0002 /* Mode 1 is supported */
126#define ID_UDMA_0_SUP 0x0001 /* Mode 0 is supported */
127
128/* DMA registers */
129#define DMA_COMMAND 0 /* Command register */
130#define DMA_CMD_WRITE 0x08 /* PCI bus master writes */
131#define DMA_CMD_START 0x01 /* Start Bus Master */
132#define DMA_STATUS 2 /* Status register */
133#define DMA_ST_D1_DMACAP 0x40 /* Drive 1 is DMA capable */
134#define DMA_ST_D0_DMACAP 0x20 /* Drive 0 is DMA capable */
135#define DMA_ST_INT 0x04 /* Interrupt */
136#define DMA_ST_ERROR 0x02 /* Error */
137#define DMA_ST_BM_ACTIVE 0x01 /* Bus Master IDE Active */
138#define DMA_PRDTP 4 /* PRD Table Pointer */
139
140/* Check for the presence of LBA48 only on drives that are 'big'. */
141#define LBA48_CHECK_SIZE 0x0f000000
142#define LBA_MAX_SIZE 0x0fffffff /* Highest sector size for
143 * regular LBA.
144 */
145
146#if ENABLE_ATAPI
147#define ERROR_SENSE 0xF0 /* sense key mask */
148#define SENSE_NONE 0x00 /* no sense key */
149#define SENSE_RECERR 0x10 /* recovered error */
150#define SENSE_NOTRDY 0x20 /* not ready */
151#define SENSE_MEDERR 0x30 /* medium error */
152#define SENSE_HRDERR 0x40 /* hardware error */
153#define SENSE_ILRQST 0x50 /* illegal request */
154#define SENSE_UATTN 0x60 /* unit attention */
155#define SENSE_DPROT 0x70 /* data protect */
156#define SENSE_ABRT 0xb0 /* aborted command */
157#define SENSE_MISCOM 0xe0 /* miscompare */
158#define ERROR_MCR 0x08 /* media change requested */
159#define ERROR_ABRT 0x04 /* aborted command */
160#define ERROR_EOM 0x02 /* end of media detected */
161#define ERROR_ILI 0x01 /* illegal length indication */
162#define REG_FEAT 1 /* features */
163#define FEAT_OVERLAP 0x02 /* overlap */
164#define FEAT_DMA 0x01 /* dma */
165#define REG_IRR 2 /* interrupt reason register */
166#define IRR_REL 0x04 /* release */
167#define IRR_IO 0x02 /* direction for xfer */
168#define IRR_COD 0x01 /* command or data */
169#define REG_SAMTAG 3
170#define REG_CNT_LO 4 /* low byte of cylinder number */
171#define REG_CNT_HI 5 /* high byte of cylinder number */
172#define REG_DRIVE 6 /* drive select */
173#endif
174
175#define REG_STATUS 7 /* status */
176#define STATUS_BSY 0x80 /* controller busy */
177#define STATUS_DRDY 0x40 /* drive ready */
178#define STATUS_DMADF 0x20 /* dma ready/drive fault */
179#define STATUS_SRVCDSC 0x10 /* service or dsc */
180#define STATUS_DRQ 0x08 /* data transfer request */
181#define STATUS_CORR 0x04 /* correctable error occurred */
182#define STATUS_CHECK 0x01 /* check error */
183
184#ifdef ENABLE_ATAPI
185#define ATAPI_PACKETCMD 0xA0 /* packet command */
186#define ATAPI_IDENTIFY 0xA1 /* identify drive */
187#define SCSI_READ10 0x28 /* read from disk */
188#define SCSI_SENSE 0x03 /* sense request */
189
190#define CD_SECTOR_SIZE 2048 /* sector size of a CD-ROM */
191#endif /* ATAPI */
192
193/* Interrupt request lines. */
194#define NO_IRQ 0 /* no IRQ set yet */
195
196#define ATAPI_PACKETSIZE 12
197#define SENSE_PACKETSIZE 18
198
199/* Common command block */
200struct command {
201 u8_t precomp; /* REG_PRECOMP, etc. */
202 u8_t count;
203 u8_t sector;
204 u8_t cyl_lo;
205 u8_t cyl_hi;
206 u8_t ldh;
207 u8_t command;
208
209 /* The following at for LBA48 */
210 u8_t count_prev;
211 u8_t sector_prev;
212 u8_t cyl_lo_prev;
213 u8_t cyl_hi_prev;
214};
215
216/* Error codes */
217#define ERR (-1) /* general error */
218#define ERR_BAD_SECTOR (-2) /* block marked bad detected */
219
220/* Some controllers don't interrupt, the clock will wake us up. */
221#define WAKEUP (32*HZ) /* drive may be out for 31 seconds max */
222
223/* Miscellaneous. */
224#define MAX_DRIVES 8
225#define COMPAT_DRIVES 4
226#if _WORD_SIZE > 2
227#define MAX_SECS 256 /* controller can transfer this many sectors */
228#else
229#define MAX_SECS 127 /* but not to a 16 bit process */
230#endif
231#define MAX_ERRORS 4 /* how often to try rd/wt before quitting */
232#define NR_MINORS (MAX_DRIVES * DEV_PER_DRIVE)
233#define SUB_PER_DRIVE (NR_PARTITIONS * NR_PARTITIONS)
234#define NR_SUBDEVS (MAX_DRIVES * SUB_PER_DRIVE)
235#define DELAY_USECS 1000 /* controller timeout in microseconds */
236#define DELAY_TICKS 1 /* controller timeout in ticks */
237#define DEF_TIMEOUT_TICKS 300 /* controller timeout in ticks */
238#define RECOVERY_USECS 500000 /* controller recovery time in microseconds */
239#define RECOVERY_TICKS 30 /* controller recovery time in ticks */
240#define INITIALIZED 0x01 /* drive is initialized */
241#define DEAF 0x02 /* controller must be reset */
242#define SMART 0x04 /* drive supports ATA commands */
243#if ENABLE_ATAPI
244#define ATAPI 0x08 /* it is an ATAPI device */
245#else
246#define ATAPI 0 /* don't bother with ATAPI; optimise out */
247#endif
248#define IDENTIFIED 0x10 /* w_identify done successfully */
249#define IGNORING 0x20 /* w_identify failed once */
250
251/* Timeouts and max retries. */
252int timeout_ticks = DEF_TIMEOUT_TICKS, max_errors = MAX_ERRORS;
253int wakeup_ticks = WAKEUP;
254long w_standard_timeouts = 0, w_pci_debug = 0, w_instance = 0,
255 disable_dma = 0, atapi_debug = 0;
256
257int w_testing = 0, w_silent = 0;
258
259int w_next_drive = 0;
260
261/* Variables. */
262
263/* The struct wini is indexed by controller first, then drive (0-3).
264 * Controller 0 is always the 'compatability' ide controller, at
265 * the fixed locations, whether present or not.
266 */
267PRIVATE struct wini { /* main drive struct, one entry per drive */
268 unsigned state; /* drive state: deaf, initialized, dead */
269 unsigned short w_status; /* device status register */
270 unsigned base_cmd; /* command base register */
271 unsigned base_ctl; /* control base register */
272 unsigned base_dma; /* dma base register */
273 unsigned irq; /* interrupt request line */
274 unsigned irq_mask; /* 1 << irq */
275 unsigned irq_need_ack; /* irq needs to be acknowledged */
276 int irq_hook_id; /* id of irq hook at the kernel */
277 int lba48; /* supports lba48 */
278 int dma; /* supports dma */
279 unsigned lcylinders; /* logical number of cylinders (BIOS) */
280 unsigned lheads; /* logical number of heads */
281 unsigned lsectors; /* logical number of sectors per track */
282 unsigned pcylinders; /* physical number of cylinders (translated) */
283 unsigned pheads; /* physical number of heads */
284 unsigned psectors; /* physical number of sectors per track */
285 unsigned ldhpref; /* top four bytes of the LDH (head) register */
286 unsigned precomp; /* write precompensation cylinder / 4 */
287 unsigned max_count; /* max request for this drive */
288 unsigned open_ct; /* in-use count */
289 struct device part[DEV_PER_DRIVE]; /* disks and partitions */
290 struct device subpart[SUB_PER_DRIVE]; /* subpartitions */
291} wini[MAX_DRIVES], *w_wn;
292
293PRIVATE int w_device = -1;
294PRIVATE int w_controller = -1;
295PRIVATE int w_major = -1;
296PRIVATE char w_id_string[40];
297
298PRIVATE int win_tasknr; /* my task number */
299PRIVATE int w_command; /* current command in execution */
300PRIVATE u8_t w_byteval; /* used for SYS_IRQCTL */
301PRIVATE int w_drive; /* selected drive */
302PRIVATE int w_controller; /* selected controller */
303PRIVATE struct device *w_dv; /* device's base and size */
304
305/* Unfortunately, DMA_SECTORS and DMA_BUF_SIZE are already defined libdriver
306 * for 'tmp_buf'.
307 */
308#define ATA_DMA_SECTORS 64
309#define ATA_DMA_BUF_SIZE (ATA_DMA_SECTORS*SECTOR_SIZE)
310
311PRIVATE char dma_buf[ATA_DMA_BUF_SIZE];
312PRIVATE phys_bytes dma_buf_phys;
313
314#define N_PRDTE 1024 /* Should be enough for large requests */
315
316PRIVATE struct prdte
317{
318 u32_t prdte_base;
319 u16_t prdte_count;
320 u8_t prdte_reserved;
321 u8_t prdte_flags;
322} prdt[N_PRDTE];
323PRIVATE phys_bytes prdt_phys;
324
325#define PRDTE_FL_EOT 0x80 /* End of table */
326
327/* Some IDE devices announce themselves as RAID controllers */
328PRIVATE struct
329{
330 u16_t vendor;
331 u16_t device;
332} raid_table[]=
333{
334 { 0x1106, 0x3149 }, /* VIA VT6420 */
335 { 0, 0 } /* end of list */
336};
337
338FORWARD _PROTOTYPE( void init_params, (void) );
339FORWARD _PROTOTYPE( void init_drive, (struct wini *w, int base_cmd,
340 int base_ctl, int base_dma, int irq, int ack, int hook,
341 int drive) );
342FORWARD _PROTOTYPE( void init_params_pci, (int) );
343FORWARD _PROTOTYPE( int w_do_open, (struct driver *dp, message *m_ptr) );
344FORWARD _PROTOTYPE( struct device *w_prepare, (int dev) );
345FORWARD _PROTOTYPE( int w_identify, (void) );
346FORWARD _PROTOTYPE( char *w_name, (void) );
347FORWARD _PROTOTYPE( int w_specify, (void) );
348FORWARD _PROTOTYPE( int w_io_test, (void) );
349FORWARD _PROTOTYPE( int w_transfer, (int proc_nr, int opcode, off_t position,
350 iovec_t *iov, unsigned nr_req) );
351FORWARD _PROTOTYPE( int com_out, (struct command *cmd) );
352FORWARD _PROTOTYPE( int com_out_ext, (struct command *cmd) );
353FORWARD _PROTOTYPE( void setup_dma, (unsigned *sizep, int proc_nr,
354 iovec_t *iov, int do_write, int *do_copyoutp) );
355FORWARD _PROTOTYPE( void w_need_reset, (void) );
356FORWARD _PROTOTYPE( void ack_irqs, (unsigned int) );
357FORWARD _PROTOTYPE( int w_do_close, (struct driver *dp, message *m_ptr) );
358FORWARD _PROTOTYPE( int w_other, (struct driver *dp, message *m_ptr) );
359FORWARD _PROTOTYPE( int w_hw_int, (struct driver *dp, message *m_ptr) );
360FORWARD _PROTOTYPE( int com_simple, (struct command *cmd) );
361FORWARD _PROTOTYPE( void w_timeout, (void) );
362FORWARD _PROTOTYPE( int w_reset, (void) );
363FORWARD _PROTOTYPE( void w_intr_wait, (void) );
364FORWARD _PROTOTYPE( int at_intr_wait, (void) );
365FORWARD _PROTOTYPE( int w_waitfor, (int mask, int value) );
366FORWARD _PROTOTYPE( int w_waitfor_dma, (int mask, int value) );
367FORWARD _PROTOTYPE( void w_geometry, (struct partition *entry) );
368#if ENABLE_ATAPI
369FORWARD _PROTOTYPE( int atapi_sendpacket, (u8_t *packet, unsigned cnt) );
370FORWARD _PROTOTYPE( int atapi_intr_wait, (void) );
371FORWARD _PROTOTYPE( int atapi_open, (void) );
372FORWARD _PROTOTYPE( void atapi_close, (void) );
373FORWARD _PROTOTYPE( int atapi_transfer, (int proc_nr, int opcode,
374 off_t position, iovec_t *iov, unsigned nr_req) );
375#endif
376
377/* Entry points to this driver. */
378PRIVATE struct driver w_dtab = {
379 w_name, /* current device's name */
380 w_do_open, /* open or mount request, initialize device */
381 w_do_close, /* release device */
382 do_diocntl, /* get or set a partition's geometry */
383 w_prepare, /* prepare for I/O on a given minor device */
384 w_transfer, /* do the I/O */
385 nop_cleanup, /* nothing to clean up */
386 w_geometry, /* tell the geometry of the disk */
387 nop_signal, /* no cleanup needed on shutdown */
388 nop_alarm, /* ignore leftover alarms */
389 nop_cancel, /* ignore CANCELs */
390 nop_select, /* ignore selects */
391 w_other, /* catch-all for unrecognized commands and ioctls */
392 w_hw_int /* leftover hardware interrupts */
393};
394
395/*===========================================================================*
396 * at_winchester_task *
397 *===========================================================================*/
398PUBLIC int main()
399{
400/* Install signal handlers. Ask PM to transform signal into message. */
401 struct sigaction sa;
402
403 sa.sa_handler = SIG_MESS;
404 sigemptyset(&sa.sa_mask);
405 sa.sa_flags = 0;
406 if (sigaction(SIGTERM,&sa,NULL)<0) panic("AT","sigaction failed", errno);
407
408 /* Set special disk parameters then call the generic main loop. */
409 init_params();
410 signal(SIGTERM, SIG_IGN);
411 driver_task(&w_dtab);
412 return(OK);
413}
414
415/*===========================================================================*
416 * init_params *
417 *===========================================================================*/
418PRIVATE void init_params()
419{
420/* This routine is called at startup to initialize the drive parameters. */
421
422 u16_t parv[2];
423 unsigned int vector, size;
424 int drive, nr_drives;
425 struct wini *wn;
426 u8_t params[16];
427 int s;
428
429 /* Boot variables. */
430 env_parse("ata_std_timeout", "d", 0, &w_standard_timeouts, 0, 1);
431 env_parse("ata_pci_debug", "d", 0, &w_pci_debug, 0, 1);
432 env_parse("ata_instance", "d", 0, &w_instance, 0, 8);
433 env_parse("ata_no_dma", "d", 0, &disable_dma, 0, 1);
434 env_parse("atapi_debug", "d", 0, &atapi_debug, 0, 1);
435
436 if (disable_dma)
437 printf("DMA for ATA devices is disabled.\n");
438
439 s= sys_umap(SELF, D, (vir_bytes)dma_buf, sizeof(dma_buf), &dma_buf_phys);
440 if (s != 0)
441 panic("at_wini", "can't map dma buffer", s);
442
443 s= sys_umap(SELF, D, (vir_bytes)prdt, sizeof(prdt), &prdt_phys);
444 if (s != 0)
445 panic("at_wini", "can't map prd table", s);
446
447 if (w_instance == 0) {
448 /* Get the number of drives from the BIOS data area */
449 if ((s=sys_vircopy(SELF, BIOS_SEG, NR_HD_DRIVES_ADDR,
450 SELF, D, (vir_bytes) params, NR_HD_DRIVES_SIZE)) != OK)
451 panic(w_name(), "Couldn't read BIOS", s);
452 if ((nr_drives = params[0]) > 2) nr_drives = 2;
453
454 for (drive = 0, wn = wini; drive < COMPAT_DRIVES; drive++, wn++) {
455 if (drive < nr_drives) {
456 /* Copy the BIOS parameter vector */
457 vector = (drive == 0) ? BIOS_HD0_PARAMS_ADDR:BIOS_HD1_PARAMS_ADDR;
458 size = (drive == 0) ? BIOS_HD0_PARAMS_SIZE:BIOS_HD1_PARAMS_SIZE;
459 if ((s=sys_vircopy(SELF, BIOS_SEG, vector,
460 SELF, D, (vir_bytes) parv, size)) != OK)
461 panic(w_name(), "Couldn't read BIOS", s);
462
463 /* Calculate the address of the parameters and copy them */
464 if ((s=sys_vircopy(
465 SELF, BIOS_SEG, hclick_to_physb(parv[1]) + parv[0],
466 SELF, D, (phys_bytes) params, 16L))!=OK)
467 panic(w_name(),"Couldn't copy parameters", s);
468
469 /* Copy the parameters to the structures of the drive */
470 wn->lcylinders = bp_cylinders(params);
471 wn->lheads = bp_heads(params);
472 wn->lsectors = bp_sectors(params);
473 wn->precomp = bp_precomp(params) >> 2;
474 }
475
476 /* Fill in non-BIOS parameters. */
477 init_drive(wn,
478 drive < 2 ? REG_CMD_BASE0 : REG_CMD_BASE1,
479 drive < 2 ? REG_CTL_BASE0 : REG_CTL_BASE1,
480 0 /* no DMA */, NO_IRQ, 0, 0, drive);
481 w_next_drive++;
482 }
483 }
484
485 /* Look for controllers on the pci bus. Skip none the first instance,
486 * skip one and then 2 for every instance, for every next instance.
487 */
488 if (w_instance == 0)
489 init_params_pci(0);
490 else
491 init_params_pci(w_instance*2-1);
492
493}
494
495#define ATA_IF_NOTCOMPAT1 (1L << 0)
496#define ATA_IF_NOTCOMPAT2 (1L << 2)
497
498/*===========================================================================*
499 * init_drive *
500 *===========================================================================*/
501PRIVATE void init_drive(struct wini *w, int base_cmd, int base_ctl,
502 int base_dma, int irq, int ack, int hook, int drive)
503{
504 w->state = 0;
505 w->w_status = 0;
506 w->base_cmd = base_cmd;
507 w->base_ctl = base_ctl;
508 w->base_dma = base_dma;
509 w->irq = irq;
510 w->irq_mask = 1 << irq;
511 w->irq_need_ack = ack;
512 w->irq_hook_id = hook;
513 w->ldhpref = ldh_init(drive);
514 w->max_count = MAX_SECS << SECTOR_SHIFT;
515 w->lba48 = 0;
516 w->dma = 0;
517}
518
519/*===========================================================================*
520 * init_params_pci *
521 *===========================================================================*/
522PRIVATE void init_params_pci(int skip)
523{
524 int i, r, devind, drive;
525 int irq, irq_hook, raid;
526 u8_t bcr, scr, interface;
527 u16_t vid, did;
528 u32_t base_dma, t3;
529
530 pci_init();
531 for(drive = w_next_drive; drive < MAX_DRIVES; drive++)
532 wini[drive].state = IGNORING;
533 for(r = pci_first_dev(&devind, &vid, &did); r != 0;
534 r = pci_next_dev(&devind, &vid, &did)) {
535
536 raid= 0;
537
538 /* Except class 01h (mass storage), subclass be 01h (ATA).
539 * Also check listed RAID controllers.
540 */
541 bcr= pci_attr_r8(devind, PCI_BCR);
542 scr= pci_attr_r8(devind, PCI_SCR);
543 interface= pci_attr_r8(devind, PCI_PIFR);
544 t3= ((bcr << 16) | (scr << 8) | interface);
545 if (bcr == PCI_BCR_MASS_STORAGE && scr == PCI_MS_IDE)
546 ; /* Okay */
547 else if (t3 == PCI_T3_RAID)
548 {
549 for (i= 0; raid_table[i].vendor != 0; i++)
550 {
551 if (raid_table[i].vendor == vid &&
552 raid_table[i].device == did)
553 {
554 break;
555 }
556 }
557 if (raid_table[i].vendor == 0)
558 {
559 printf(
560 "atapci skipping unsupported RAID controller 0x%04x / 0x%04x\n",
561 vid, did);
562 continue;
563 }
564 printf("found supported RAID controller\n");
565 raid= 1;
566 }
567 else
568 continue; /* Unsupported device class */
569
570 /* Found a controller.
571 * Programming interface register tells us more.
572 */
573 irq = pci_attr_r8(devind, PCI_ILR);
574
575 /* Any non-compat drives? */
576 if (raid || (interface & (ATA_IF_NOTCOMPAT1 | ATA_IF_NOTCOMPAT2))) {
577 int s;
578
579 if (w_next_drive >= MAX_DRIVES)
580 {
581 /* We can't accept more drives, but have to search for
582 * controllers operating in compatibility mode.
583 */
584 continue;
585 }
586
587 irq_hook = irq;
588 if (skip > 0) {
589 if (w_pci_debug)
590 {
591 printf(
592 "atapci skipping controller (remain %d)\n",
593 skip);
594 }
595 skip--;
596 continue;
597 }
598 if ((s=sys_irqsetpolicy(irq, 0, &irq_hook)) != OK) {
599 printf("atapci: couldn't set IRQ policy %d\n", irq);
600 continue;
601 }
602 if ((s=sys_irqenable(&irq_hook)) != OK) {
603 printf("atapci: couldn't enable IRQ line %d\n", irq);
604 continue;
605 }
606 }
607
608 base_dma = pci_attr_r32(devind, PCI_BAR_5) & 0xfffffffc;
609
610 /* Primary channel not in compatability mode? */
611 if (raid || (interface & ATA_IF_NOTCOMPAT1)) {
612 u32_t base_cmd, base_ctl;
613
614 base_cmd = pci_attr_r32(devind, PCI_BAR) & 0xfffffffc;
615 base_ctl = pci_attr_r32(devind, PCI_BAR_2) & 0xfffffffc;
616 if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {
617 init_drive(&wini[w_next_drive],
618 base_cmd, base_ctl+PCI_CTL_OFF,
619 base_dma, irq, 1, irq_hook, 0);
620 init_drive(&wini[w_next_drive+1],
621 base_cmd, base_ctl+PCI_CTL_OFF,
622 base_dma, irq, 1, irq_hook, 1);
623 if (w_pci_debug)
624 printf("atapci %d: 0x%x 0x%x irq %d\n", devind, base_cmd, base_ctl, irq);
625 w_next_drive += 2;
626 } else printf("atapci: ignored drives on primary channel, base %x\n", base_cmd);
627 }
628 else
629 {
630 /* Update base_dma for compatibility device */
631 for (i= 0; i<MAX_DRIVES; i++)
632 {
633 if (wini[i].base_cmd == REG_CMD_BASE0)
634 wini[i].base_dma= base_dma;
635 }
636 }
637
638 /* Secondary channel not in compatability mode? */
639 if (raid || (interface & ATA_IF_NOTCOMPAT2)) {
640 u32_t base_cmd, base_ctl;
641
642 base_cmd = pci_attr_r32(devind, PCI_BAR_3) & 0xfffffffc;
643 base_ctl = pci_attr_r32(devind, PCI_BAR_4) & 0xfffffffc;
644 if (base_dma != 0)
645 base_dma += PCI_DMA_2ND_OFF;
646 if (base_cmd != REG_CMD_BASE0 && base_cmd != REG_CMD_BASE1) {
647 init_drive(&wini[w_next_drive],
648 base_cmd, base_ctl+PCI_CTL_OFF, base_dma,
649 irq, 1, irq_hook, 2);
650 init_drive(&wini[w_next_drive+1],
651 base_cmd, base_ctl+PCI_CTL_OFF, base_dma,
652 irq, 1, irq_hook, 3);
653 if (w_pci_debug)
654 printf("atapci %d: 0x%x 0x%x irq %d\n", devind, base_cmd, base_ctl, irq);
655 w_next_drive += 2;
656 } else printf("atapci: ignored drives on secondary channel, base %x\n", base_cmd);
657 }
658 else
659 {
660 /* Update base_dma for compatibility device */
661 for (i= 0; i<MAX_DRIVES; i++)
662 {
663 if (wini[i].base_cmd == REG_CMD_BASE1 && base_dma != 0)
664 wini[i].base_dma= base_dma+PCI_DMA_2ND_OFF;
665 }
666 }
667 }
668}
669
670/*===========================================================================*
671 * w_do_open *
672 *===========================================================================*/
673PRIVATE int w_do_open(dp, m_ptr)
674struct driver *dp;
675message *m_ptr;
676{
677/* Device open: Initialize the controller and read the partition table. */
678
679 struct wini *wn;
680
681 if (w_prepare(m_ptr->DEVICE) == NIL_DEV) return(ENXIO);
682
683 wn = w_wn;
684
685 /* If we've probed it before and it failed, don't probe it again. */
686 if (wn->state & IGNORING) return ENXIO;
687
688 /* If we haven't identified it yet, or it's gone deaf,
689 * (re-)identify it.
690 */
691 if (!(wn->state & IDENTIFIED) || (wn->state & DEAF)) {
692 /* Try to identify the device. */
693 if (w_identify() != OK) {
694#if VERBOSE
695 printf("%s: probe failed\n", w_name());
696#endif
697 if (wn->state & DEAF) w_reset();
698 wn->state = IGNORING;
699 return(ENXIO);
700 }
701 /* Do a test transaction unless it's a CD drive (then
702 * we can believe the controller, and a test may fail
703 * due to no CD being in the drive). If it fails, ignore
704 * the device forever.
705 */
706 if (!(wn->state & ATAPI) && w_io_test() != OK) {
707 wn->state |= IGNORING;
708 return(ENXIO);
709 }
710
711#if VERBOSE
712 printf("%s: AT driver detected ", w_name());
713 if (wn->state & (SMART|ATAPI)) {
714 printf("%.40s\n", w_id_string);
715 } else {
716 printf("%ux%ux%u\n", wn->pcylinders, wn->pheads, wn->psectors);
717 }
718#endif
719 }
720
721#if ENABLE_ATAPI
722 if ((wn->state & ATAPI) && (m_ptr->COUNT & W_BIT))
723 return(EACCES);
724#endif
725
726 /* Partition the drive if it's being opened for the first time,
727 * or being opened after being closed.
728 */
729 if (wn->open_ct == 0) {
730#if ENABLE_ATAPI
731 if (wn->state & ATAPI) {
732 int r;
733 if ((r = atapi_open()) != OK) return(r);
734 }
735#endif
736
737 /* Partition the disk. */
738 partition(&w_dtab, w_drive * DEV_PER_DRIVE, P_PRIMARY, wn->state & ATAPI);
739 }
740 wn->open_ct++;
741 return(OK);
742}
743
744/*===========================================================================*
745 * w_prepare *
746 *===========================================================================*/
747PRIVATE struct device *w_prepare(int device)
748{
749/* Prepare for I/O on a device. */
750struct wini *prev_wn;
751prev_wn = w_wn;
752 w_device = device;
753
754 if (device < NR_MINORS) { /* d0, d0p[0-3], d1, ... */
755 w_drive = device / DEV_PER_DRIVE; /* save drive number */
756 w_wn = &wini[w_drive];
757 w_dv = &w_wn->part[device % DEV_PER_DRIVE];
758 } else
759 if ((unsigned) (device -= MINOR_d0p0s0) < NR_SUBDEVS) {/*d[0-7]p[0-3]s[0-3]*/
760 w_drive = device / SUB_PER_DRIVE;
761 w_wn = &wini[w_drive];
762 w_dv = &w_wn->subpart[device % SUB_PER_DRIVE];
763 } else {
764 w_device = -1;
765 return(NIL_DEV);
766 }
767 return(w_dv);
768}
769
770/*===========================================================================*
771 * w_identify *
772 *===========================================================================*/
773PRIVATE int w_identify()
774{
775/* Find out if a device exists, if it is an old AT disk, or a newer ATA
776 * drive, a removable media device, etc.
777 */
778
779 struct wini *wn = w_wn;
780 struct command cmd;
781 int i, s;
782 int id_dma, ultra_dma;
783 u32_t dma_base;
784 u16_t w;
785 unsigned long dma_status;
786 unsigned long size;
787#define id_byte(n) (&tmp_buf[2 * (n)])
788#define id_word(n) (((u16_t) id_byte(n)[0] << 0) \
789 |((u16_t) id_byte(n)[1] << 8))
790#define id_longword(n) (((u32_t) id_byte(n)[0] << 0) \
791 |((u32_t) id_byte(n)[1] << 8) \
792 |((u32_t) id_byte(n)[2] << 16) \
793 |((u32_t) id_byte(n)[3] << 24))
794
795 /* Try to identify the device. */
796 cmd.ldh = wn->ldhpref;
797 cmd.command = ATA_IDENTIFY;
798 if (com_simple(&cmd) == OK && w_waitfor(STATUS_DRQ, STATUS_DRQ) &&
799 !(wn->w_status & (STATUS_ERR|STATUS_WF))) {
800
801 /* Device information. */
802 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, SECTOR_SIZE)) != OK)
803 panic(w_name(),"Call to sys_insw() failed", s);
804
805 if (id_word(0) & ID_GEN_NOT_ATA)
806 {
807 printf("%s: not an ATA device?\n", w_name());
808 return ERR;
809 }
810
811 /* This is an ATA device. */
812 wn->state |= SMART;
813
814 /* Why are the strings byte swapped??? */
815 for (i = 0; i < 40; i++) w_id_string[i] = id_byte(27)[i^1];
816
817 /* Preferred CHS translation mode. */
818 wn->pcylinders = id_word(1);
819 wn->pheads = id_word(3);
820 wn->psectors = id_word(6);
821 size = (u32_t) wn->pcylinders * wn->pheads * wn->psectors;
822
823 w= id_word(ID_CAPABILITIES);
824 if ((w & ID_CAP_LBA) && size > 512L*1024*2) {
825 /* Drive is LBA capable and is big enough to trust it to
826 * not make a mess of it.
827 */
828 wn->ldhpref |= LDH_LBA;
829 size = id_longword(60);
830
831 w= id_word(ID_CSS);
832 if (size < LBA48_CHECK_SIZE)
833 {
834 /* No need to check for LBA48 */
835 }
836 else if (w & ID_CSS_LBA48) {
837 /* Drive is LBA48 capable (and LBA48 is turned on). */
838 if (id_longword(102)) {
839 /* If no. of sectors doesn't fit in 32 bits,
840 * trunacte to this. So it's LBA32 for now.
841 * This can still address devices up to 2TB
842 * though.
843 */
844 size = ULONG_MAX;
845 } else {
846 /* Actual number of sectors fits in 32 bits. */
847 size = id_longword(100);
848 }
849 wn->lba48 = 1;
850 }
851
852 /* Check for DMA. Assume that only LBA capable devices can do
853 * DMA.
854 */
855 w= id_word(ID_CAPABILITIES);
856 id_dma= !!(w & ID_CAP_DMA);
857 w= id_byte(ID_FIELD_VALIDITY)[0];
858 ultra_dma= !!(w & ID_FV_88);
859 dma_base= wn->base_dma;
860 if (dma_base)
861 {
862 if (sys_inb(dma_base + DMA_STATUS, &dma_status) != OK)
863 {
864 panic(w_name(),
865 "unable to read DMA status register",
866 NO_NUM);
867 }
868 }
869 if (disable_dma)
870 ; /* DMA is disabled */
871 else if (id_dma && dma_base)
872 {
873 w= id_word(ID_MULTIWORD_DMA);
874 if (w & (ID_MWDMA_2_SUP|ID_MWDMA_1_SUP|ID_MWDMA_0_SUP))
875 {
876 printf(
877 "%s: multiword DMA modes supported:%s%s%s\n",
878 w_name(),
879 (w & ID_MWDMA_0_SUP) ? " 0" : "",
880 (w & ID_MWDMA_1_SUP) ? " 1" : "",
881 (w & ID_MWDMA_2_SUP) ? " 2" : "");
882 }
883 if (w & (ID_MWDMA_0_SEL|ID_MWDMA_1_SEL|ID_MWDMA_2_SEL))
884 {
885 printf(
886 "%s: multiword DMA mode selected:%s%s%s\n",
887 w_name(),
888 (w & ID_MWDMA_0_SEL) ? " 0" : "",
889 (w & ID_MWDMA_1_SEL) ? " 1" : "",
890 (w & ID_MWDMA_2_SEL) ? " 2" : "");
891 }
892 if (ultra_dma)
893 {
894 w= id_word(ID_ULTRA_DMA);
895 if (w & (ID_UDMA_0_SUP|ID_UDMA_1_SUP|
896 ID_UDMA_2_SUP|ID_UDMA_3_SUP|
897 ID_UDMA_4_SUP|ID_UDMA_5_SUP))
898 {
899 printf(
900 "%s: Ultra DMA modes supported:%s%s%s%s%s%s\n",
901 w_name(),
902 (w & ID_UDMA_0_SUP) ? " 0" : "",
903 (w & ID_UDMA_1_SUP) ? " 1" : "",
904 (w & ID_UDMA_2_SUP) ? " 2" : "",
905 (w & ID_UDMA_3_SUP) ? " 3" : "",
906 (w & ID_UDMA_4_SUP) ? " 4" : "",
907 (w & ID_UDMA_5_SUP) ? " 5" : "");
908 }
909 if (w & (ID_UDMA_0_SEL|ID_UDMA_1_SEL|
910 ID_UDMA_2_SEL|ID_UDMA_3_SEL|
911 ID_UDMA_4_SEL|ID_UDMA_5_SEL))
912 {
913 printf(
914 "%s: Ultra DMA mode selected:%s%s%s%s%s%s\n",
915 w_name(),
916 (w & ID_UDMA_0_SEL) ? " 0" : "",
917 (w & ID_UDMA_1_SEL) ? " 1" : "",
918 (w & ID_UDMA_2_SEL) ? " 2" : "",
919 (w & ID_UDMA_3_SEL) ? " 3" : "",
920 (w & ID_UDMA_4_SEL) ? " 4" : "",
921 (w & ID_UDMA_5_SEL) ? " 5" : "");
922 }
923 }
924 wn->dma= 1;
925 }
926 else if (id_dma || dma_base)
927 {
928 printf("id_dma %d, dma_base 0x%x\n", id_dma, dma_base);
929 }
930 else
931 printf("no DMA support\n");
932
933#if 0
934 if (wn->dma && wn == &wini[0])
935 {
936 printf("disabling DMA for drive 0\n");
937 wn->dma= 0;
938 }
939#endif
940 }
941
942 if (wn->lcylinders == 0) {
943 /* No BIOS parameters? Then make some up. */
944 wn->lcylinders = wn->pcylinders;
945 wn->lheads = wn->pheads;
946 wn->lsectors = wn->psectors;
947 while (wn->lcylinders > 1024) {
948 wn->lheads *= 2;
949 wn->lcylinders /= 2;
950 }
951 }
952#if ENABLE_ATAPI
953 } else
954 if (cmd.command = ATAPI_IDENTIFY,
955 com_simple(&cmd) == OK && w_waitfor(STATUS_DRQ, STATUS_DRQ) &&
956 !(wn->w_status & (STATUS_ERR|STATUS_WF))) {
957 /* An ATAPI device. */
958 wn->state |= ATAPI;
959
960 /* Device information. */
961 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, 512)) != OK)
962 panic(w_name(),"Call to sys_insw() failed", s);
963
964 /* Why are the strings byte swapped??? */
965 for (i = 0; i < 40; i++) w_id_string[i] = id_byte(27)[i^1];
966
967 size = 0; /* Size set later. */
968#endif
969 } else {
970 /* Not an ATA device; no translations, no special features. Don't
971 * touch it unless the BIOS knows about it.
972 */
973 if (wn->lcylinders == 0) { return(ERR); } /* no BIOS parameters */
974 wn->pcylinders = wn->lcylinders;
975 wn->pheads = wn->lheads;
976 wn->psectors = wn->lsectors;
977 size = (u32_t) wn->pcylinders * wn->pheads * wn->psectors;
978 }
979
980 /* Size of the whole drive */
981 wn->part[0].dv_size = mul64u(size, SECTOR_SIZE);
982
983 /* Reset/calibrate (where necessary) */
984 if (w_specify() != OK && w_specify() != OK) {
985 return(ERR);
986 }
987
988 if (wn->irq == NO_IRQ) {
989 /* Everything looks OK; register IRQ so we can stop polling. */
990 wn->irq = w_drive < 2 ? AT_WINI_0_IRQ : AT_WINI_1_IRQ;
991 wn->irq_hook_id = wn->irq; /* id to be returned if interrupt occurs */
992 if ((s=sys_irqsetpolicy(wn->irq, IRQ_REENABLE, &wn->irq_hook_id)) != OK)
993 panic(w_name(), "couldn't set IRQ policy", s);
994 if ((s=sys_irqenable(&wn->irq_hook_id)) != OK)
995 panic(w_name(), "couldn't enable IRQ line", s);
996 }
997 wn->state |= IDENTIFIED;
998 return(OK);
999}
1000
1001/*===========================================================================*
1002 * w_name *
1003 *===========================================================================*/
1004PRIVATE char *w_name()
1005{
1006/* Return a name for the current device. */
1007 static char name[] = "AT-D0";
1008
1009 name[4] = '0' + w_drive;
1010 return name;
1011}
1012
1013/*===========================================================================*
1014 * w_io_test *
1015 *===========================================================================*/
1016PRIVATE int w_io_test(void)
1017{
1018 int r, save_dev;
1019 int save_timeout, save_errors, save_wakeup;
1020 iovec_t iov;
1021#ifdef CD_SECTOR_SIZE
1022 static char buf[CD_SECTOR_SIZE];
1023#else
1024 static char buf[SECTOR_SIZE];
1025#endif
1026
1027 iov.iov_addr = (vir_bytes) buf;
1028 iov.iov_size = sizeof(buf);
1029 save_dev = w_device;
1030
1031 /* Reduce timeout values for this test transaction. */
1032 save_timeout = timeout_ticks;
1033 save_errors = max_errors;
1034 save_wakeup = wakeup_ticks;
1035
1036 if (!w_standard_timeouts) {
1037 timeout_ticks = HZ * 4;
1038 wakeup_ticks = HZ * 6;
1039 max_errors = 3;
1040 }
1041
1042 w_testing = 1;
1043
1044 /* Try I/O on the actual drive (not any (sub)partition). */
1045 if (w_prepare(w_drive * DEV_PER_DRIVE) == NIL_DEV)
1046 panic(w_name(), "Couldn't switch devices", NO_NUM);
1047
1048 r = w_transfer(SELF, DEV_GATHER, 0, &iov, 1);
1049
1050 /* Switch back. */
1051 if (w_prepare(save_dev) == NIL_DEV)
1052 panic(w_name(), "Couldn't switch back devices", NO_NUM);
1053
1054 /* Restore parameters. */
1055 timeout_ticks = save_timeout;
1056 max_errors = save_errors;
1057 wakeup_ticks = save_wakeup;
1058 w_testing = 0;
1059
1060 /* Test if everything worked. */
1061 if (r != OK || iov.iov_size != 0) {
1062 return ERR;
1063 }
1064
1065 /* Everything worked. */
1066
1067 return OK;
1068}
1069
1070/*===========================================================================*
1071 * w_specify *
1072 *===========================================================================*/
1073PRIVATE int w_specify()
1074{
1075/* Routine to initialize the drive after boot or when a reset is needed. */
1076
1077 struct wini *wn = w_wn;
1078 struct command cmd;
1079
1080 if ((wn->state & DEAF) && w_reset() != OK) {
1081 return(ERR);
1082 }
1083
1084 if (!(wn->state & ATAPI)) {
1085 /* Specify parameters: precompensation, number of heads and sectors. */
1086 cmd.precomp = wn->precomp;
1087 cmd.count = wn->psectors;
1088 cmd.ldh = w_wn->ldhpref | (wn->pheads - 1);
1089 cmd.command = CMD_SPECIFY; /* Specify some parameters */
1090
1091 /* Output command block and see if controller accepts the parameters. */
1092 if (com_simple(&cmd) != OK) return(ERR);
1093
1094 if (!(wn->state & SMART)) {
1095 /* Calibrate an old disk. */
1096 cmd.sector = 0;
1097 cmd.cyl_lo = 0;
1098 cmd.cyl_hi = 0;
1099 cmd.ldh = w_wn->ldhpref;
1100 cmd.command = CMD_RECALIBRATE;
1101
1102 if (com_simple(&cmd) != OK) return(ERR);
1103 }
1104 }
1105 wn->state |= INITIALIZED;
1106 return(OK);
1107}
1108
1109/*===========================================================================*
1110 * do_transfer *
1111 *===========================================================================*/
1112PRIVATE int do_transfer(struct wini *wn, unsigned int precomp,
1113 unsigned int count, unsigned int sector,
1114 unsigned int opcode, int do_dma)
1115{
1116 struct command cmd;
1117 unsigned int sector_high;
1118 unsigned secspcyl = wn->pheads * wn->psectors;
1119 int do_lba48;
1120
1121 sector_high= 0; /* For future extensions */
1122
1123 do_lba48= 0;
1124 if (sector >= LBA48_CHECK_SIZE || sector_high != 0)
1125 {
1126 if (wn->lba48)
1127 do_lba48= 1;
1128 else if (sector > LBA_MAX_SIZE || sector_high != 0)
1129 {
1130 /* Strange sector count for LBA device */
1131 return EIO;
1132 }
1133 }
1134
1135 cmd.precomp = precomp;
1136 cmd.count = count;
1137 if (do_dma)
1138 {
1139 cmd.command = opcode == DEV_SCATTER ? CMD_WRITE_DMA :
1140 CMD_READ_DMA;
1141 }
1142 else
1143 cmd.command = opcode == DEV_SCATTER ? CMD_WRITE : CMD_READ;
1144
1145 if (do_lba48) {
1146 if (do_dma)
1147 {
1148 cmd.command = ((opcode == DEV_SCATTER) ?
1149 CMD_WRITE_DMA_EXT : CMD_READ_DMA_EXT);
1150 }
1151 else
1152 {
1153 cmd.command = ((opcode == DEV_SCATTER) ?
1154 CMD_WRITE_EXT : CMD_READ_EXT);
1155 }
1156 cmd.count_prev= (count >> 8);
1157 cmd.sector = (sector >> 0) & 0xFF;
1158 cmd.cyl_lo = (sector >> 8) & 0xFF;
1159 cmd.cyl_hi = (sector >> 16) & 0xFF;
1160 cmd.sector_prev= (sector >> 24) & 0xFF;
1161 cmd.cyl_lo_prev= (sector_high) & 0xFF;
1162 cmd.cyl_hi_prev= (sector_high >> 8) & 0xFF;
1163 cmd.ldh = wn->ldhpref;
1164
1165 return com_out_ext(&cmd);
1166 } else if (wn->ldhpref & LDH_LBA) {
1167 cmd.sector = (sector >> 0) & 0xFF;
1168 cmd.cyl_lo = (sector >> 8) & 0xFF;
1169 cmd.cyl_hi = (sector >> 16) & 0xFF;
1170 cmd.ldh = wn->ldhpref | ((sector >> 24) & 0xF);
1171 } else {
1172 int cylinder, head, sec;
1173 cylinder = sector / secspcyl;
1174 head = (sector % secspcyl) / wn->psectors;
1175 sec = sector % wn->psectors;
1176 cmd.sector = sec + 1;
1177 cmd.cyl_lo = cylinder & BYTE;
1178 cmd.cyl_hi = (cylinder >> 8) & BYTE;
1179 cmd.ldh = wn->ldhpref | head;
1180 }
1181
1182 return com_out(&cmd);
1183}
1184
1185/*===========================================================================*
1186 * w_transfer *
1187 *===========================================================================*/
1188PRIVATE int w_transfer(proc_nr, opcode, position, iov, nr_req)
1189int proc_nr; /* process doing the request */
1190int opcode; /* DEV_GATHER or DEV_SCATTER */
1191off_t position; /* offset on device to read or write */
1192iovec_t *iov; /* pointer to read or write request vector */
1193unsigned nr_req; /* length of request vector */
1194{
1195 struct wini *wn = w_wn;
1196 iovec_t *iop, *iov_end = iov + nr_req;
1197 int n, r, s, errors, do_dma, do_write, do_copyout;
1198 unsigned long v, block, w_status;
1199 unsigned long dv_size = cv64ul(w_dv->dv_size);
1200 unsigned cylinder, head, sector, nbytes;
1201 unsigned dma_buf_offset;
1202
1203#if ENABLE_ATAPI
1204 if (w_wn->state & ATAPI) {
1205 return atapi_transfer(proc_nr, opcode, position, iov, nr_req);
1206 }
1207#endif
1208
1209
1210
1211 /* Check disk address. */
1212 if ((position & SECTOR_MASK) != 0) return(EINVAL);
1213
1214 errors = 0;
1215
1216 while (nr_req > 0) {
1217 /* How many bytes to transfer? */
1218 nbytes = 0;
1219 for (iop = iov; iop < iov_end; iop++) nbytes += iop->iov_size;
1220 if ((nbytes & SECTOR_MASK) != 0) return(EINVAL);
1221
1222 /* Which block on disk and how close to EOF? */
1223 if (position >= dv_size) return(OK); /* At EOF */
1224 if (position + nbytes > dv_size) nbytes = dv_size - position;
1225 block = div64u(add64ul(w_dv->dv_base, position), SECTOR_SIZE);
1226
1227 do_dma= wn->dma;
1228 do_write= (opcode == DEV_SCATTER);
1229
1230 if (nbytes >= wn->max_count) {
1231 /* The drive can't do more then max_count at once. */
1232 nbytes = wn->max_count;
1233 }
1234
1235 /* First check to see if a reinitialization is needed. */
1236 if (!(wn->state & INITIALIZED) && w_specify() != OK) return(EIO);
1237
1238 if (do_dma)
1239 {
1240 setup_dma(&nbytes, proc_nr, iov, do_write, &do_copyout);
1241#if 0
1242 printf("nbytes = %d\n", nbytes);
1243#endif
1244 }
1245
1246 /* Tell the controller to transfer nbytes bytes. */
1247 r = do_transfer(wn, wn->precomp, (nbytes >> SECTOR_SHIFT),
1248 block, opcode, do_dma);
1249
1250 if (opcode == DEV_SCATTER) {
1251 /* The specs call for a 400 ns wait after issuing the command.
1252 * Reading the alternate status register is the suggested
1253 * way to implement this wait.
1254 */
1255 if (sys_inb((wn->base_ctl+REG_CTL_ALTSTAT), &w_status) != OK)
1256 panic(w_name(), "couldn't get status", NO_NUM);
1257 }
1258
1259 if (do_dma)
1260 {
1261 /* Wait for the interrupt, check DMA status and optionally
1262 * copy out.
1263 */
1264
1265 if ((r = at_intr_wait()) != OK)
1266 {
1267 /* Don't retry if sector marked bad or too many
1268 * errors.
1269 */
1270 if (r == ERR_BAD_SECTOR || ++errors == max_errors) {
1271 w_command = CMD_IDLE;
1272 return(EIO);
1273 }
1274 continue;
1275 }
1276
1277 /* Wait for DMA_ST_INT to get set */
1278 w_waitfor_dma(DMA_ST_INT, DMA_ST_INT);
1279
1280 r= sys_inb(wn->base_dma + DMA_STATUS, &v);
1281 if (r != 0) panic("at_wini", "w_transfer: sys_inb failed", r);
1282
1283#if 0
1284 printf("dma_status: 0x%x\n", v);
1285#endif
1286 if (!(v & DMA_ST_INT))
1287 {
1288 /* DMA did not complete successfully */
1289 if (v & DMA_ST_BM_ACTIVE)
1290 panic(w_name(), "DMA did not complete", NO_NUM);
1291 else if (v & DMA_ST_ERROR)
1292 {
1293 printf("at_wini: DMA error\n");
1294 r= EIO;
1295 break;
1296 }
1297 else
1298 {
1299#if 0
1300 printf("DMA buffer too small\n");
1301#endif
1302 panic(w_name(), "DMA buffer too small", NO_NUM);
1303 }
1304 }
1305 else if (v & DMA_ST_BM_ACTIVE)
1306 panic(w_name(), "DMA buffer too large", NO_NUM);
1307
1308 dma_buf_offset= 0;
1309 while (r == OK && nbytes > 0)
1310 {
1311 n= iov->iov_size;
1312 if (n > nbytes)
1313 n= nbytes;
1314
1315 if (do_copyout)
1316 {
1317 s= sys_vircopy(SELF, D,
1318 (vir_bytes)dma_buf+dma_buf_offset,
1319 proc_nr, D, iov->iov_addr, n);
1320 if (s != OK)
1321 {
1322 panic(w_name(),
1323 "w_transfer: sys_vircopy failed",
1324 s);
1325 }
1326 }
1327
1328 /* Book the bytes successfully transferred. */
1329 nbytes -= n;
1330 position += n;
1331 iov->iov_addr += n;
1332 if ((iov->iov_size -= n) == 0)
1333 { iov++; nr_req--; }
1334 dma_buf_offset += n;
1335 }
1336 }
1337
1338 while (r == OK && nbytes > 0) {
1339 /* For each sector, wait for an interrupt and fetch the data
1340 * (read), or supply data to the controller and wait for an
1341 * interrupt (write).
1342 */
1343
1344 if (opcode == DEV_GATHER) {
1345 /* First an interrupt, then data. */
1346 if ((r = at_intr_wait()) != OK) {
1347 /* An error, send data to the bit bucket. */
1348 if (w_wn->w_status & STATUS_DRQ) {
1349 if ((s=sys_insw(wn->base_cmd+REG_DATA,
1350 SELF, tmp_buf,
1351 SECTOR_SIZE)) != OK)
1352 {
1353 panic(w_name(),
1354 "Call to sys_insw() failed",
1355 s);
1356 }
1357 }
1358 break;
1359 }
1360 }
1361
1362 /* Wait for busy to clear. */
1363 if (!w_waitfor(STATUS_BSY, 0)) { r = ERR; break; }
1364
1365 /* Wait for data transfer requested. */
1366 if (!w_waitfor(STATUS_DRQ, STATUS_DRQ)) { r = ERR; break; }
1367
1368 /* Copy bytes to or from the device's buffer. */
1369 if (opcode == DEV_GATHER) {
1370 if ((s=sys_insw(wn->base_cmd + REG_DATA, proc_nr,
1371 (void *) iov->iov_addr, SECTOR_SIZE)) != OK)
1372 {
1373 panic(w_name(),"Call to sys_insw() failed", s);
1374 }
1375 } else {
1376 if ((s=sys_outsw(wn->base_cmd + REG_DATA, proc_nr,
1377 (void *) iov->iov_addr, SECTOR_SIZE)) != OK)
1378 {
1379 panic(w_name(),"Call to sys_outsw() failed",
1380 s);
1381 }
1382
1383 /* Data sent, wait for an interrupt. */
1384 if ((r = at_intr_wait()) != OK) break;
1385 }
1386
1387 /* Book the bytes successfully transferred. */
1388 nbytes -= SECTOR_SIZE;
1389 position += SECTOR_SIZE;
1390 iov->iov_addr += SECTOR_SIZE;
1391 if ((iov->iov_size -= SECTOR_SIZE) == 0) { iov++; nr_req--; }
1392 }
1393
1394 /* Any errors? */
1395 if (r != OK) {
1396 /* Don't retry if sector marked bad or too many errors. */
1397 if (r == ERR_BAD_SECTOR || ++errors == max_errors) {
1398 w_command = CMD_IDLE;
1399 return(EIO);
1400 }
1401 }
1402 }
1403
1404 w_command = CMD_IDLE;
1405 return(OK);
1406}
1407
1408/*===========================================================================*
1409 * com_out *
1410 *===========================================================================*/
1411PRIVATE int com_out(cmd)
1412struct command *cmd; /* Command block */
1413{
1414/* Output the command block to the winchester controller and return status */
1415
1416 struct wini *wn = w_wn;
1417 unsigned base_cmd = wn->base_cmd;
1418 unsigned base_ctl = wn->base_ctl;
1419 pvb_pair_t outbyte[7]; /* vector for sys_voutb() */
1420 int s; /* status for sys_(v)outb() */
1421
1422 if (w_wn->state & IGNORING) return ERR;
1423
1424 if (!w_waitfor(STATUS_BSY, 0)) {
1425 printf("%s: controller not ready\n", w_name());
1426 return(ERR);
1427 }
1428
1429 /* Select drive. */
1430 if ((s=sys_outb(base_cmd + REG_LDH, cmd->ldh)) != OK)
1431 panic(w_name(),"Couldn't write register to select drive",s);
1432
1433 if (!w_waitfor(STATUS_BSY, 0)) {
1434 printf("%s: com_out: drive not ready\n", w_name());
1435 return(ERR);
1436 }
1437
1438 /* Schedule a wakeup call, some controllers are flaky. This is done with
1439 * a synchronous alarm. If a timeout occurs a SYN_ALARM message is sent
1440 * from HARDWARE, so that w_intr_wait() can call w_timeout() in case the
1441 * controller was not able to execute the command. Leftover timeouts are
1442 * simply ignored by the main loop.
1443 */
1444 sys_setalarm(wakeup_ticks, 0);
1445
1446 wn->w_status = STATUS_ADMBSY;
1447 w_command = cmd->command;
1448 pv_set(outbyte[0], base_ctl + REG_CTL, wn->pheads >= 8 ? CTL_EIGHTHEADS : 0);
1449 pv_set(outbyte[1], base_cmd + REG_PRECOMP, cmd->precomp);
1450 pv_set(outbyte[2], base_cmd + REG_COUNT, cmd->count);
1451 pv_set(outbyte[3], base_cmd + REG_SECTOR, cmd->sector);
1452 pv_set(outbyte[4], base_cmd + REG_CYL_LO, cmd->cyl_lo);
1453 pv_set(outbyte[5], base_cmd + REG_CYL_HI, cmd->cyl_hi);
1454 pv_set(outbyte[6], base_cmd + REG_COMMAND, cmd->command);
1455 if ((s=sys_voutb(outbyte,7)) != OK)
1456 panic(w_name(),"Couldn't write registers with sys_voutb()",s);
1457 return(OK);
1458}
1459
1460/*===========================================================================*
1461 * com_out_ext *
1462 *===========================================================================*/
1463PRIVATE int com_out_ext(cmd)
1464struct command *cmd; /* Command block */
1465{
1466/* Output the command block to the winchester controller and return status */
1467
1468 struct wini *wn = w_wn;
1469 unsigned base_cmd = wn->base_cmd;
1470 unsigned base_ctl = wn->base_ctl;
1471 pvb_pair_t outbyte[11]; /* vector for sys_voutb() */
1472 int s; /* status for sys_(v)outb() */
1473 unsigned long w_status;
1474
1475 if (w_wn->state & IGNORING) return ERR;
1476
1477 if (!w_waitfor(STATUS_BSY, 0)) {
1478 printf("%s: controller not ready\n", w_name());
1479 return(ERR);
1480 }
1481
1482 /* Select drive. */
1483 if ((s=sys_outb(base_cmd + REG_LDH, cmd->ldh)) != OK)
1484 panic(w_name(),"Couldn't write register to select drive",s);
1485
1486 if (!w_waitfor(STATUS_BSY, 0)) {
1487 printf("%s: com_out: drive not ready\n", w_name());
1488 return(ERR);
1489 }
1490
1491 /* Schedule a wakeup call, some controllers are flaky. This is done with
1492 * a synchronous alarm. If a timeout occurs a SYN_ALARM message is sent
1493 * from HARDWARE, so that w_intr_wait() can call w_timeout() in case the
1494 * controller was not able to execute the command. Leftover timeouts are
1495 * simply ignored by the main loop.
1496 */
1497 sys_setalarm(wakeup_ticks, 0);
1498
1499 wn->w_status = STATUS_ADMBSY;
1500 w_command = cmd->command;
1501 pv_set(outbyte[0], base_ctl + REG_CTL, 0);
1502 pv_set(outbyte[1], base_cmd + REG_COUNT, cmd->count_prev);
1503 pv_set(outbyte[2], base_cmd + REG_SECTOR, cmd->sector_prev);
1504 pv_set(outbyte[3], base_cmd + REG_CYL_LO, cmd->cyl_lo_prev);
1505 pv_set(outbyte[4], base_cmd + REG_CYL_HI, cmd->cyl_hi_prev);
1506 pv_set(outbyte[5], base_cmd + REG_COUNT, cmd->count);
1507 pv_set(outbyte[6], base_cmd + REG_SECTOR, cmd->sector);
1508 pv_set(outbyte[7], base_cmd + REG_CYL_LO, cmd->cyl_lo);
1509 pv_set(outbyte[8], base_cmd + REG_CYL_HI, cmd->cyl_hi);
1510
1511 pv_set(outbyte[10], base_cmd + REG_COMMAND, cmd->command);
1512 if ((s=sys_voutb(outbyte, 11)) != OK)
1513 panic(w_name(),"Couldn't write registers with sys_voutb()",s);
1514
1515 return(OK);
1516}
1517
1518/*===========================================================================*
1519 * setup_dma *
1520 *===========================================================================*/
1521PRIVATE void setup_dma(sizep, proc_nr, iov, do_write, do_copyoutp)
1522unsigned *sizep;
1523int proc_nr;
1524iovec_t *iov;
1525int do_write;
1526int *do_copyoutp;
1527{
1528 phys_bytes phys, user_phys;
1529 unsigned n, offset, size;
1530 int i, j, r, bad;
1531 unsigned long v;
1532 struct wini *wn = w_wn;
1533
1534 /* First try direct scatter/gather to the supplied buffers */
1535 size= *sizep;
1536 i= 0; /* iov index */
1537 j= 0; /* prdt index */
1538 bad= 0;
1539 offset= 0; /* Offset in current iov */
1540
1541#if 0
1542 printf("setup_dma: proc_nr %d\n", proc_nr);
1543#endif
1544
1545 while (size > 0)
1546 {
1547#if 0
1548 printf(
1549 "setup_dma: iov[%d]: addr 0x%x, size %d offset %d, size %d\n",
1550 i, iov[i].iov_addr, iov[i].iov_size, offset, size);
1551#endif
1552
1553 n= iov[i].iov_size-offset;
1554 if (n > size)
1555 n= size;
1556 if (n == 0 || (n & 1))
1557 panic("at_wini", "bad size in iov", iov[i].iov_size);
1558 r= sys_umap(proc_nr, D, iov[i].iov_addr+offset, n, &user_phys);
1559 if (r != 0)
1560 panic("at_wini", "can't map user buffer", r);
1561 if (user_phys & 1)
1562 {
1563 /* Buffer is not aligned */
1564 printf("setup_dma: user buffer is not aligned\n");
1565 bad= 1;
1566 break;
1567 }
1568
1569 /* vector is not allowed to cross a 64K boundary */
1570 if (user_phys/0x10000 != (user_phys+n-1)/0x10000)
1571 n= ((user_phys/0x10000)+1)*0x10000 - user_phys;
1572
1573 /* vector is not allowed to be bigger than 64K, but we get that
1574 * for free.
1575 */
1576
1577 if (j >= N_PRDTE)
1578 {
1579 /* Too many entries */
1580 bad= 1;
1581 break;
1582 }
1583
1584 prdt[j].prdte_base= user_phys;
1585 prdt[j].prdte_count= n;
1586 prdt[j].prdte_reserved= 0;
1587 prdt[j].prdte_flags= 0;
1588 j++;
1589
1590 offset += n;
1591 if (offset >= iov[i].iov_size)
1592 {
1593 i++;
1594 offset= 0;
1595 }
1596
1597 size -= n;
1598 }
1599
1600 if (!bad)
1601 {
1602 if (j <= 0 || j > N_PRDTE)
1603 panic("at_wini", "bad prdt index", j);
1604 prdt[j-1].prdte_flags |= PRDTE_FL_EOT;
1605
1606#if 0
1607 for (i= 0; i<j; i++)
1608 {
1609 printf("prdt[%d]: base 0x%x, size %d, flags 0x%x\n",
1610 i, prdt[i].prdte_base, prdt[i].prdte_count,
1611 prdt[i].prdte_flags);
1612 }
1613#endif
1614 }
1615
1616 /* The caller needs to perform a copy-out from the dma buffer if
1617 * this is a read request and we can't DMA directly to the user's
1618 * buffers.
1619 */
1620 *do_copyoutp= (!do_write && bad);
1621
1622 if (bad)
1623 {
1624 /* Adjust request size */
1625 size= *sizep;
1626 if (size > ATA_DMA_BUF_SIZE)
1627 *sizep= size= ATA_DMA_BUF_SIZE;
1628
1629 if (do_write)
1630 {
1631 /* Copy-in */
1632 for (offset= 0; offset < size; offset += n)
1633 {
1634 n= size-offset;
1635 if (n > iov->iov_size)
1636 n= iov->iov_size;
1637
1638 r= sys_vircopy(proc_nr, D, iov->iov_addr,
1639 SELF, D, (vir_bytes)dma_buf+offset,
1640 n);
1641 if (r != OK)
1642 {
1643 panic(w_name(),
1644 "setup_dma: sys_vircopy failed",
1645 r);
1646 }
1647 iov++;
1648 }
1649 }
1650
1651 /* Fill-in the physical region descriptor table */
1652 phys= dma_buf_phys;
1653 if (phys & 1)
1654 {
1655 /* Two byte alignment is required */
1656 panic("at_wini", "bad buffer alignment in setup_dma",
1657 phys);
1658 }
1659 for (j= 0; j<N_PRDTE; i++)
1660 {
1661 if (size == 0)
1662 {
1663 panic("at_wini", "bad size in setup_dma",
1664 size);
1665 }
1666 if (size & 1)
1667 {
1668 /* Two byte alignment is required for size */
1669 panic("at_wini",
1670 "bad size alignment in setup_dma",
1671 size);
1672 }
1673 n= size;
1674
1675 /* Buffer is not allowed to cross a 64K boundary */
1676 if (phys / 0x10000 != (phys+n-1) / 0x10000)
1677 {
1678 n= ((phys/0x10000)+1)*0x10000 - phys;
1679 }
1680 prdt[j].prdte_base= phys;
1681 prdt[j].prdte_count= n;
1682 prdt[j].prdte_reserved= 0;
1683 prdt[j].prdte_flags= 0;
1684
1685 size -= n;
1686 if (size == 0)
1687 {
1688 prdt[j].prdte_flags |= PRDTE_FL_EOT;
1689 break;
1690 }
1691 }
1692 if (size != 0)
1693 panic("at_wini", "size to large for prdt", NO_NUM);
1694
1695#if 0
1696 for (i= 0; i<=j; i++)
1697 {
1698 printf("prdt[%d]: base 0x%x, size %d, flags 0x%x\n",
1699 i, prdt[i].prdte_base, prdt[i].prdte_count,
1700 prdt[i].prdte_flags);
1701 }
1702#endif
1703 }
1704
1705 /* Stop bus master operation */
1706 r= sys_outb(wn->base_dma + DMA_COMMAND, 0);
1707 if (r != 0) panic("at_wini", "setup_dma: sys_outb failed", r);
1708
1709 /* Verify that the bus master is not active */
1710 r= sys_inb(wn->base_dma + DMA_STATUS, &v);
1711 if (r != 0) panic("at_wini", "setup_dma: sys_inb failed", r);
1712 if (v & DMA_ST_BM_ACTIVE)
1713 panic("at_wini", "Bus master IDE active", NO_NUM);
1714
1715 if (prdt_phys & 3)
1716 panic("at_wini", "prdt not aligned", prdt_phys);
1717 r= sys_outl(wn->base_dma + DMA_PRDTP, prdt_phys);
1718 if (r != 0) panic("at_wini", "setup_dma: sys_outl failed", r);
1719
1720 /* Clear interrupt and error flags */
1721 r= sys_outb(wn->base_dma + DMA_STATUS, DMA_ST_INT | DMA_ST_ERROR);
1722 if (r != 0) panic("at_wini", "setup_dma: sys_outb failed", r);
1723
1724 /* Assume disk reads. Start DMA */
1725 v= DMA_CMD_START;
1726 if (!do_write)
1727 {
1728 /* Disk reads generate PCI write cycles. */
1729 v |= DMA_CMD_WRITE;
1730 }
1731 r= sys_outb(wn->base_dma + DMA_COMMAND, v);
1732 if (r != 0) panic("at_wini", "setup_dma: sys_outb failed", r);
1733
1734#if 0
1735 r= sys_inb(wn->base_dma + DMA_STATUS, &v);
1736 if (r != 0) panic("at_wini", "setup_dma: sys_inb failed", r);
1737 printf("dma status: 0x%x\n", v);
1738#endif
1739}
1740
1741
1742/*===========================================================================*
1743 * w_need_reset *
1744 *===========================================================================*/
1745PRIVATE void w_need_reset()
1746{
1747/* The controller needs to be reset. */
1748 struct wini *wn;
1749 int dr = 0;
1750
1751 for (wn = wini; wn < &wini[MAX_DRIVES]; wn++, dr++) {
1752 if (wn->base_cmd == w_wn->base_cmd) {
1753 wn->state |= DEAF;
1754 wn->state &= ~INITIALIZED;
1755 }
1756 }
1757}
1758
1759/*===========================================================================*
1760 * w_do_close *
1761 *===========================================================================*/
1762PRIVATE int w_do_close(dp, m_ptr)
1763struct driver *dp;
1764message *m_ptr;
1765{
1766/* Device close: Release a device. */
1767 if (w_prepare(m_ptr->DEVICE) == NIL_DEV)
1768 return(ENXIO);
1769 w_wn->open_ct--;
1770#if ENABLE_ATAPI
1771 if (w_wn->open_ct == 0 && (w_wn->state & ATAPI)) atapi_close();
1772#endif
1773 return(OK);
1774}
1775
1776/*===========================================================================*
1777 * com_simple *
1778 *===========================================================================*/
1779PRIVATE int com_simple(cmd)
1780struct command *cmd; /* Command block */
1781{
1782/* A simple controller command, only one interrupt and no data-out phase. */
1783 int r;
1784
1785 if (w_wn->state & IGNORING) return ERR;
1786
1787 if ((r = com_out(cmd)) == OK) r = at_intr_wait();
1788 w_command = CMD_IDLE;
1789 return(r);
1790}
1791
1792/*===========================================================================*
1793 * w_timeout *
1794 *===========================================================================*/
1795PRIVATE void w_timeout(void)
1796{
1797 struct wini *wn = w_wn;
1798
1799 switch (w_command) {
1800 case CMD_IDLE:
1801 break; /* fine */
1802 case CMD_READ:
1803 case CMD_READ_EXT:
1804 case CMD_WRITE:
1805 case CMD_WRITE_EXT:
1806 /* Impossible, but not on PC's: The controller does not respond. */
1807
1808 /* Limiting multisector I/O seems to help. */
1809 if (wn->max_count > 8 * SECTOR_SIZE) {
1810 wn->max_count = 8 * SECTOR_SIZE;
1811 } else {
1812 wn->max_count = SECTOR_SIZE;
1813 }
1814 /*FALL THROUGH*/
1815 default:
1816 /* Some other command. */
1817 if (w_testing) wn->state |= IGNORING; /* Kick out this drive. */
1818 else if (!w_silent) printf("%s: timeout on command 0x%02x\n",
1819 w_name(), w_command);
1820 w_need_reset();
1821 wn->w_status = 0;
1822 }
1823}
1824
1825/*===========================================================================*
1826 * w_reset *
1827 *===========================================================================*/
1828PRIVATE int w_reset()
1829{
1830/* Issue a reset to the controller. This is done after any catastrophe,
1831 * like the controller refusing to respond.
1832 */
1833 int s;
1834 struct wini *wn = w_wn;
1835
1836 /* Don't bother if this drive is forgotten. */
1837 if (w_wn->state & IGNORING) return ERR;
1838
1839 /* Wait for any internal drive recovery. */
1840 tickdelay(RECOVERY_TICKS);
1841
1842 /* Strobe reset bit */
1843 if ((s=sys_outb(wn->base_ctl + REG_CTL, CTL_RESET)) != OK)
1844 panic(w_name(),"Couldn't strobe reset bit",s);
1845 tickdelay(DELAY_TICKS);
1846 if ((s=sys_outb(wn->base_ctl + REG_CTL, 0)) != OK)
1847 panic(w_name(),"Couldn't strobe reset bit",s);
1848 tickdelay(DELAY_TICKS);
1849
1850 /* Wait for controller ready */
1851 if (!w_waitfor(STATUS_BSY, 0)) {
1852 printf("%s: reset failed, drive busy\n", w_name());
1853 return(ERR);
1854 }
1855
1856 /* The error register should be checked now, but some drives mess it up. */
1857
1858 for (wn = wini; wn < &wini[MAX_DRIVES]; wn++) {
1859 if (wn->base_cmd == w_wn->base_cmd) {
1860 wn->state &= ~DEAF;
1861 if (w_wn->irq_need_ack) {
1862 /* Make sure irq is actually enabled.. */
1863 sys_irqenable(&w_wn->irq_hook_id);
1864 }
1865 }
1866 }
1867
1868
1869 return(OK);
1870}
1871
1872/*===========================================================================*
1873 * w_intr_wait *
1874 *===========================================================================*/
1875PRIVATE void w_intr_wait()
1876{
1877/* Wait for a task completion interrupt. */
1878
1879 int r;
1880 unsigned long w_status;
1881 message m;
1882
1883 if (w_wn->irq != NO_IRQ) {
1884 /* Wait for an interrupt that sets w_status to "not busy". */
1885 while (w_wn->w_status & (STATUS_ADMBSY|STATUS_BSY)) {
1886 int rr;
1887 if((rr=receive(ANY, &m)) != OK) { /* expect HARD_INT message */
1888 printf("w_intr_wait: receive from ANY failed (%d)\n",
1889 r);
1890 continue; /* try again */
1891 }
1892 if (m.m_type == SYN_ALARM) { /* but check for timeout */
1893 w_timeout(); /* a.o. set w_status */
1894 } else if (m.m_type == HARD_INT) {
1895 r= sys_inb(w_wn->base_cmd + REG_STATUS, &w_status);
1896 if (r != 0)
1897 panic("at_wini", "sys_inb failed", r);
1898 w_wn->w_status= w_status;
1899 ack_irqs(m.NOTIFY_ARG);
1900 } else if (m.m_type == DEV_PING) {
1901 notify(m.m_source);
1902 } else {
1903 printf("AT_WINI got unexpected message %d from %d\n",
1904 m.m_type, m.m_source);
1905 }
1906 }
1907 } else {
1908 /* Interrupt not yet allocated; use polling. */
1909 (void) w_waitfor(STATUS_BSY, 0);
1910 }
1911}
1912
1913/*===========================================================================*
1914 * at_intr_wait *
1915 *===========================================================================*/
1916PRIVATE int at_intr_wait()
1917{
1918/* Wait for an interrupt, study the status bits and return error/success. */
1919 int r, s;
1920 unsigned long inbval;
1921
1922 w_intr_wait();
1923 if ((w_wn->w_status & (STATUS_BSY | STATUS_WF | STATUS_ERR)) == 0) {
1924 r = OK;
1925 } else {
1926 if ((s=sys_inb(w_wn->base_cmd + REG_ERROR, &inbval)) != OK)
1927 panic(w_name(),"Couldn't read register",s);
1928 if ((w_wn->w_status & STATUS_ERR) && (inbval & ERROR_BB)) {
1929 r = ERR_BAD_SECTOR; /* sector marked bad, retries won't help */
1930 } else {
1931 r = ERR; /* any other error */
1932 }
1933 }
1934 w_wn->w_status |= STATUS_ADMBSY; /* assume still busy with I/O */
1935 return(r);
1936}
1937
1938/*===========================================================================*
1939 * w_waitfor *
1940 *===========================================================================*/
1941PRIVATE int w_waitfor(mask, value)
1942int mask; /* status mask */
1943int value; /* required status */
1944{
1945/* Wait until controller is in the required state. Return zero on timeout.
1946 * An alarm that set a timeout flag is used. TIMEOUT is in micros, we need
1947 * ticks. Disabling the alarm is not needed, because a static flag is used
1948 * and a leftover timeout cannot do any harm.
1949 */
1950 unsigned long w_status;
1951 clock_t t0, t1;
1952 int s;
1953
1954 getuptime(&t0);
1955 do {
1956 if ((s=sys_inb(w_wn->base_cmd + REG_STATUS, &w_status)) != OK)
1957 panic(w_name(),"Couldn't read register",s);
1958 w_wn->w_status= w_status;
1959 if ((w_wn->w_status & mask) == value) {
1960 return 1;
1961 }
1962 } while ((s=getuptime(&t1)) == OK && (t1-t0) < timeout_ticks );
1963 if (OK != s) printf("AT_WINI: warning, get_uptime failed: %d\n",s);
1964
1965 w_need_reset(); /* controller gone deaf */
1966 return(0);
1967}
1968
1969/*===========================================================================*
1970 * w_waitfor_dma *
1971 *===========================================================================*/
1972PRIVATE int w_waitfor_dma(mask, value)
1973int mask; /* status mask */
1974int value; /* required status */
1975{
1976/* Wait until controller is in the required state. Return zero on timeout.
1977 * An alarm that set a timeout flag is used. TIMEOUT is in micros, we need
1978 * ticks. Disabling the alarm is not needed, because a static flag is used
1979 * and a leftover timeout cannot do any harm.
1980 */
1981 unsigned long w_status;
1982 clock_t t0, t1;
1983 int s;
1984
1985 getuptime(&t0);
1986 do {
1987 if ((s=sys_inb(w_wn->base_dma + DMA_STATUS, &w_status)) != OK)
1988 panic(w_name(),"Couldn't read register",s);
1989 if ((w_status & mask) == value) {
1990 return 1;
1991 }
1992 } while ((s=getuptime(&t1)) == OK && (t1-t0) < timeout_ticks );
1993 if (OK != s) printf("AT_WINI: warning, get_uptime failed: %d\n",s);
1994
1995 return(0);
1996}
1997
1998/*===========================================================================*
1999 * w_geometry *
2000 *===========================================================================*/
2001PRIVATE void w_geometry(entry)
2002struct partition *entry;
2003{
2004 struct wini *wn = w_wn;
2005
2006 if (wn->state & ATAPI) { /* Make up some numbers. */
2007 entry->cylinders = div64u(wn->part[0].dv_size, SECTOR_SIZE) / (64*32);
2008 entry->heads = 64;
2009 entry->sectors = 32;
2010 } else { /* Return logical geometry. */
2011 entry->cylinders = wn->lcylinders;
2012 entry->heads = wn->lheads;
2013 entry->sectors = wn->lsectors;
2014 }
2015}
2016
2017#if ENABLE_ATAPI
2018/*===========================================================================*
2019 * atapi_open *
2020 *===========================================================================*/
2021PRIVATE int atapi_open()
2022{
2023/* Should load and lock the device and obtain its size. For now just set the
2024 * size of the device to something big. What is really needed is a generic
2025 * SCSI layer that does all this stuff for ATAPI and SCSI devices (kjb). (XXX)
2026 */
2027 w_wn->part[0].dv_size = mul64u(800L*1024, 1024);
2028 return(OK);
2029}
2030
2031/*===========================================================================*
2032 * atapi_close *
2033 *===========================================================================*/
2034PRIVATE void atapi_close()
2035{
2036/* Should unlock the device. For now do nothing. (XXX) */
2037}
2038
2039void sense_request(void)
2040{
2041 int r, i;
2042 static u8_t sense[100], packet[ATAPI_PACKETSIZE];
2043
2044 packet[0] = SCSI_SENSE;
2045 packet[1] = 0;
2046 packet[2] = 0;
2047 packet[3] = 0;
2048 packet[4] = SENSE_PACKETSIZE;
2049 packet[5] = 0;
2050 packet[7] = 0;
2051 packet[8] = 0;
2052 packet[9] = 0;
2053 packet[10] = 0;
2054 packet[11] = 0;
2055
2056 for(i = 0; i < SENSE_PACKETSIZE; i++) sense[i] = 0xff;
2057 r = atapi_sendpacket(packet, SENSE_PACKETSIZE);
2058 if (r != OK) { printf("request sense command failed\n"); return; }
2059 if (atapi_intr_wait() <= 0) { printf("WARNING: request response failed\n"); }
2060
2061 if (sys_insw(w_wn->base_cmd + REG_DATA, SELF, (void *) sense, SENSE_PACKETSIZE) != OK)
2062 printf("WARNING: sense reading failed\n");
2063
2064 printf("sense data:");
2065 for(i = 0; i < SENSE_PACKETSIZE; i++) printf(" %02x", sense[i]);
2066 printf("\n");
2067}
2068
2069/*===========================================================================*
2070 * atapi_transfer *
2071 *===========================================================================*/
2072PRIVATE int atapi_transfer(proc_nr, opcode, position, iov, nr_req)
2073int proc_nr; /* process doing the request */
2074int opcode; /* DEV_GATHER or DEV_SCATTER */
2075off_t position; /* offset on device to read or write */
2076iovec_t *iov; /* pointer to read or write request vector */
2077unsigned nr_req; /* length of request vector */
2078{
2079 struct wini *wn = w_wn;
2080 iovec_t *iop, *iov_end = iov + nr_req;
2081 int r, s, errors, fresh;
2082 u64_t pos;
2083 unsigned long block;
2084 unsigned long dv_size = cv64ul(w_dv->dv_size);
2085 unsigned nbytes, nblocks, count, before, chunk;
2086 static u8_t packet[ATAPI_PACKETSIZE];
2087
2088 errors = fresh = 0;
2089
2090 while (nr_req > 0 && !fresh) {
2091 /* The Minix block size is smaller than the CD block size, so we
2092 * may have to read extra before or after the good data.
2093 */
2094 pos = add64ul(w_dv->dv_base, position);
2095 block = div64u(pos, CD_SECTOR_SIZE);
2096 before = rem64u(pos, CD_SECTOR_SIZE);
2097
2098 /* How many bytes to transfer? */
2099 nbytes = count = 0;
2100 for (iop = iov; iop < iov_end; iop++) {
2101 nbytes += iop->iov_size;
2102 if ((before + nbytes) % CD_SECTOR_SIZE == 0) count = nbytes;
2103 }
2104
2105 /* Does one of the memory chunks end nicely on a CD sector multiple? */
2106 if (count != 0) nbytes = count;
2107
2108 /* Data comes in as words, so we have to enforce even byte counts. */
2109 if ((before | nbytes) & 1) return(EINVAL);
2110
2111 /* Which block on disk and how close to EOF? */
2112 if (position >= dv_size) return(OK); /* At EOF */
2113 if (position + nbytes > dv_size) nbytes = dv_size - position;
2114
2115 nblocks = (before + nbytes + CD_SECTOR_SIZE - 1) / CD_SECTOR_SIZE;
2116 if (ATAPI_DEBUG) {
2117 printf("block=%lu, before=%u, nbytes=%u, nblocks=%u\n",
2118 block, before, nbytes, nblocks);
2119 }
2120
2121 /* First check to see if a reinitialization is needed. */
2122 if (!(wn->state & INITIALIZED) && w_specify() != OK) return(EIO);
2123
2124 /* Build an ATAPI command packet. */
2125 packet[0] = SCSI_READ10;
2126 packet[1] = 0;
2127 packet[2] = (block >> 24) & 0xFF;
2128 packet[3] = (block >> 16) & 0xFF;
2129 packet[4] = (block >> 8) & 0xFF;
2130 packet[5] = (block >> 0) & 0xFF;
2131 packet[7] = (nblocks >> 8) & 0xFF;
2132 packet[8] = (nblocks >> 0) & 0xFF;
2133 packet[9] = 0;
2134 packet[10] = 0;
2135 packet[11] = 0;
2136
2137 /* Tell the controller to execute the packet command. */
2138 r = atapi_sendpacket(packet, nblocks * CD_SECTOR_SIZE);
2139 if (r != OK) goto err;
2140
2141 /* Read chunks of data. */
2142 while ((r = atapi_intr_wait()) > 0) {
2143 count = r;
2144
2145 if (ATAPI_DEBUG) {
2146 printf("before=%u, nbytes=%u, count=%u\n",
2147 before, nbytes, count);
2148 }
2149
2150 while (before > 0 && count > 0) { /* Discard before. */
2151 chunk = before;
2152 if (chunk > count) chunk = count;
2153 if (chunk > DMA_BUF_SIZE) chunk = DMA_BUF_SIZE;
2154 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, chunk)) != OK)
2155 panic(w_name(),"Call to sys_insw() failed", s);
2156 before -= chunk;
2157 count -= chunk;
2158 }
2159
2160 while (nbytes > 0 && count > 0) { /* Requested data. */
2161 chunk = nbytes;
2162 if (chunk > count) chunk = count;
2163 if (chunk > iov->iov_size) chunk = iov->iov_size;
2164 if ((s=sys_insw(wn->base_cmd + REG_DATA, proc_nr, (void *) iov->iov_addr, chunk)) != OK)
2165 panic(w_name(),"Call to sys_insw() failed", s);
2166 position += chunk;
2167 nbytes -= chunk;
2168 count -= chunk;
2169 iov->iov_addr += chunk;
2170 fresh = 0;
2171 if ((iov->iov_size -= chunk) == 0) {
2172 iov++;
2173 nr_req--;
2174 fresh = 1; /* new element is optional */
2175 }
2176 }
2177
2178 while (count > 0) { /* Excess data. */
2179 chunk = count;
2180 if (chunk > DMA_BUF_SIZE) chunk = DMA_BUF_SIZE;
2181 if ((s=sys_insw(wn->base_cmd + REG_DATA, SELF, tmp_buf, chunk)) != OK)
2182 panic(w_name(),"Call to sys_insw() failed", s);
2183 count -= chunk;
2184 }
2185 }
2186
2187 if (r < 0) {
2188 err: /* Don't retry if too many errors. */
2189 if (atapi_debug) sense_request();
2190 if (++errors == max_errors) {
2191 w_command = CMD_IDLE;
2192 if (atapi_debug) printf("giving up (%d)\n", errors);
2193 return(EIO);
2194 }
2195 if (atapi_debug) printf("retry (%d)\n", errors);
2196 }
2197 }
2198
2199 w_command = CMD_IDLE;
2200 return(OK);
2201}
2202
2203/*===========================================================================*
2204 * atapi_sendpacket *
2205 *===========================================================================*/
2206PRIVATE int atapi_sendpacket(packet, cnt)
2207u8_t *packet;
2208unsigned cnt;
2209{
2210/* Send an Atapi Packet Command */
2211 struct wini *wn = w_wn;
2212 pvb_pair_t outbyte[6]; /* vector for sys_voutb() */
2213 int s;
2214
2215 if (wn->state & IGNORING) return ERR;
2216
2217 /* Select Master/Slave drive */
2218 if ((s=sys_outb(wn->base_cmd + REG_DRIVE, wn->ldhpref)) != OK)
2219 panic(w_name(),"Couldn't select master/ slave drive",s);
2220
2221 if (!w_waitfor(STATUS_BSY | STATUS_DRQ, 0)) {
2222 printf("%s: atapi_sendpacket: drive not ready\n", w_name());
2223 return(ERR);
2224 }
2225
2226 /* Schedule a wakeup call, some controllers are flaky. This is done with
2227 * a synchronous alarm. If a timeout occurs a SYN_ALARM message is sent
2228 * from HARDWARE, so that w_intr_wait() can call w_timeout() in case the
2229 * controller was not able to execute the command. Leftover timeouts are
2230 * simply ignored by the main loop.
2231 */
2232 sys_setalarm(wakeup_ticks, 0);
2233
2234#if _WORD_SIZE > 2
2235 if (cnt > 0xFFFE) cnt = 0xFFFE; /* Max data per interrupt. */
2236#endif
2237
2238 w_command = ATAPI_PACKETCMD;
2239 pv_set(outbyte[0], wn->base_cmd + REG_FEAT, 0);
2240 pv_set(outbyte[1], wn->base_cmd + REG_IRR, 0);
2241 pv_set(outbyte[2], wn->base_cmd + REG_SAMTAG, 0);
2242 pv_set(outbyte[3], wn->base_cmd + REG_CNT_LO, (cnt >> 0) & 0xFF);
2243 pv_set(outbyte[4], wn->base_cmd + REG_CNT_HI, (cnt >> 8) & 0xFF);
2244 pv_set(outbyte[5], wn->base_cmd + REG_COMMAND, w_command);
2245 if (atapi_debug) printf("cmd: %x ", w_command);
2246 if ((s=sys_voutb(outbyte,6)) != OK)
2247 panic(w_name(),"Couldn't write registers with sys_voutb()",s);
2248
2249 if (!w_waitfor(STATUS_BSY | STATUS_DRQ, STATUS_DRQ)) {
2250 printf("%s: timeout (BSY|DRQ -> DRQ)\n", w_name());
2251 return(ERR);
2252 }
2253 wn->w_status |= STATUS_ADMBSY; /* Command not at all done yet. */
2254
2255 /* Send the command packet to the device. */
2256 if ((s=sys_outsw(wn->base_cmd + REG_DATA, SELF, packet, ATAPI_PACKETSIZE)) != OK)
2257 panic(w_name(),"sys_outsw() failed", s);
2258
2259 {
2260 int p;
2261 if (atapi_debug) {
2262 printf("sent command:");
2263 for(p = 0; p < ATAPI_PACKETSIZE; p++) { printf(" %02x", packet[p]); }
2264 printf("\n");
2265 }
2266 }
2267 return(OK);
2268}
2269
2270
2271#endif /* ENABLE_ATAPI */
2272
2273/*===========================================================================*
2274 * w_other *
2275 *===========================================================================*/
2276PRIVATE int w_other(dr, m)
2277struct driver *dr;
2278message *m;
2279{
2280 int r, timeout, prev;
2281
2282 if (m->m_type != DEV_IOCTL ) {
2283 return EINVAL;
2284 }
2285
2286 if (m->REQUEST == DIOCTIMEOUT) {
2287 if ((r=sys_datacopy(m->IO_ENDPT, (vir_bytes)m->ADDRESS,
2288 SELF, (vir_bytes)&timeout, sizeof(timeout))) != OK)
2289 return r;
2290
2291 if (timeout == 0) {
2292 /* Restore defaults. */
2293 timeout_ticks = DEF_TIMEOUT_TICKS;
2294 max_errors = MAX_ERRORS;
2295 wakeup_ticks = WAKEUP;
2296 w_silent = 0;
2297 } else if (timeout < 0) {
2298 return EINVAL;
2299 } else {
2300 prev = wakeup_ticks;
2301
2302 if (!w_standard_timeouts) {
2303 /* Set (lower) timeout, lower error
2304 * tolerance and set silent mode.
2305 */
2306 wakeup_ticks = timeout;
2307 max_errors = 3;
2308 w_silent = 1;
2309
2310 if (timeout_ticks > timeout)
2311 timeout_ticks = timeout;
2312 }
2313
2314 if ((r=sys_datacopy(SELF, (vir_bytes)&prev,
2315 m->IO_ENDPT, (vir_bytes)m->ADDRESS, sizeof(prev))) != OK)
2316 return r;
2317 }
2318
2319 return OK;
2320 } else if (m->REQUEST == DIOCOPENCT) {
2321 int count;
2322 if (w_prepare(m->DEVICE) == NIL_DEV) return ENXIO;
2323 count = w_wn->open_ct;
2324 if ((r=sys_datacopy(SELF, (vir_bytes)&count,
2325 m->IO_ENDPT, (vir_bytes)m->ADDRESS, sizeof(count))) != OK)
2326 return r;
2327 return OK;
2328 }
2329 return EINVAL;
2330}
2331
2332/*===========================================================================*
2333 * w_hw_int *
2334 *===========================================================================*/
2335PRIVATE int w_hw_int(dr, m)
2336struct driver *dr;
2337message *m;
2338{
2339 /* Leftover interrupt(s) received; ack it/them. */
2340 ack_irqs(m->NOTIFY_ARG);
2341
2342 return OK;
2343}
2344
2345
2346/*===========================================================================*
2347 * ack_irqs *
2348 *===========================================================================*/
2349PRIVATE void ack_irqs(unsigned int irqs)
2350{
2351 unsigned int drive;
2352 unsigned long w_status;
2353
2354 for (drive = 0; drive < MAX_DRIVES && irqs; drive++) {
2355 if (!(wini[drive].state & IGNORING) && wini[drive].irq_need_ack &&
2356 (wini[drive].irq_mask & irqs)) {
2357 if (sys_inb((wini[drive].base_cmd + REG_STATUS),
2358 &w_status) != OK)
2359 {
2360 panic(w_name(), "couldn't ack irq on drive %d\n",
2361 drive);
2362 }
2363 wini[drive].w_status= w_status;
2364 if (sys_irqenable(&wini[drive].irq_hook_id) != OK)
2365 printf("couldn't re-enable drive %d\n", drive);
2366 irqs &= ~wini[drive].irq_mask;
2367 }
2368 }
2369}
2370
2371
2372#define STSTR(a) if (status & STATUS_ ## a) { strcat(str, #a); strcat(str, " "); }
2373#define ERRSTR(a) if (e & ERROR_ ## a) { strcat(str, #a); strcat(str, " "); }
2374char *strstatus(int status)
2375{
2376 static char str[200];
2377 str[0] = '\0';
2378
2379 STSTR(BSY);
2380 STSTR(DRDY);
2381 STSTR(DMADF);
2382 STSTR(SRVCDSC);
2383 STSTR(DRQ);
2384 STSTR(CORR);
2385 STSTR(CHECK);
2386 return str;
2387}
2388
2389char *strerr(int e)
2390{
2391 static char str[200];
2392 str[0] = '\0';
2393
2394 ERRSTR(BB);
2395 ERRSTR(ECC);
2396 ERRSTR(ID);
2397 ERRSTR(AC);
2398 ERRSTR(TK);
2399 ERRSTR(DM);
2400
2401 return str;
2402}
2403
2404#if ENABLE_ATAPI
2405
2406/*===========================================================================*
2407 * atapi_intr_wait *
2408 *===========================================================================*/
2409PRIVATE int atapi_intr_wait()
2410{
2411/* Wait for an interrupt and study the results. Returns a number of bytes
2412 * that need to be transferred, or an error code.
2413 */
2414 struct wini *wn = w_wn;
2415 pvb_pair_t inbyte[4]; /* vector for sys_vinb() */
2416 int s; /* status for sys_vinb() */
2417 int e;
2418 int len;
2419 int irr;
2420 int r;
2421 int phase;
2422
2423 w_intr_wait();
2424
2425 /* Request series of device I/O. */
2426 inbyte[0].port = wn->base_cmd + REG_ERROR;
2427 inbyte[1].port = wn->base_cmd + REG_CNT_LO;
2428 inbyte[2].port = wn->base_cmd + REG_CNT_HI;
2429 inbyte[3].port = wn->base_cmd + REG_IRR;
2430 if ((s=sys_vinb(inbyte, 4)) != OK)
2431 panic(w_name(),"ATAPI failed sys_vinb()", s);
2432 e = inbyte[0].value;
2433 len = inbyte[1].value;
2434 len |= inbyte[2].value << 8;
2435 irr = inbyte[3].value;
2436
2437#if ATAPI_DEBUG
2438 printf("wn %p S=%x=%s E=%02x=%s L=%04x I=%02x\n", wn, wn->w_status, strstatus(wn->w_status), e, strerr(e), len, irr);
2439#endif
2440 if (wn->w_status & (STATUS_BSY | STATUS_CHECK)) {
2441 if (atapi_debug) {
2442 printf("atapi fail: S=%x=%s E=%02x=%s L=%04x I=%02x\n", wn->w_status, strstatus(wn->w_status), e, strerr(e), len, irr);
2443 }
2444 return ERR;
2445 }
2446
2447 phase = (wn->w_status & STATUS_DRQ) | (irr & (IRR_COD | IRR_IO));
2448
2449 switch (phase) {
2450 case IRR_COD | IRR_IO:
2451 if (ATAPI_DEBUG) printf("ACD: Phase Command Complete\n");
2452 r = OK;
2453 break;
2454 case 0:
2455 if (ATAPI_DEBUG) printf("ACD: Phase Command Aborted\n");
2456 r = ERR;
2457 break;
2458 case STATUS_DRQ | IRR_COD:
2459 if (ATAPI_DEBUG) printf("ACD: Phase Command Out\n");
2460 r = ERR;
2461 break;
2462 case STATUS_DRQ:
2463 if (ATAPI_DEBUG) printf("ACD: Phase Data Out %d\n", len);
2464 r = len;
2465 break;
2466 case STATUS_DRQ | IRR_IO:
2467 if (ATAPI_DEBUG) printf("ACD: Phase Data In %d\n", len);
2468 r = len;
2469 break;
2470 default:
2471 if (ATAPI_DEBUG) printf("ACD: Phase Unknown\n");
2472 r = ERR;
2473 break;
2474 }
2475
2476#if 0
2477 /* retry if the media changed */
2478 XXX while (phase == (IRR_IO | IRR_COD) && (wn->w_status & STATUS_CHECK)
2479 && (e & ERROR_SENSE) == SENSE_UATTN && --try > 0);
2480#endif
2481
2482 wn->w_status |= STATUS_ADMBSY; /* Assume not done yet. */
2483 return(r);
2484}
2485#endif /* ENABLE_ATAPI */
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