[9] | 1 | /*
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| 2 | rtl8029.c
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| 3 |
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| 4 | Initialization of PCI DP8390-based ethernet cards
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| 5 |
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| 6 | Created: April 2000 by Philip Homburg <philip@f-mnx.phicoh.com>
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| 7 | */
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| 8 |
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| 9 | #include "../drivers.h"
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| 10 |
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| 11 | #include <stdlib.h>
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| 12 | #include <sys/types.h>
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| 13 | #include <net/gen/ether.h>
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| 14 | #include <net/gen/eth_io.h>
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| 15 | #include <ibm/pci.h>
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| 16 |
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| 17 | #include "assert.h"
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| 18 |
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| 19 | #include "local.h"
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| 20 | #include "dp8390.h"
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| 21 | #include "rtl8029.h"
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| 22 |
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| 23 | #if ENABLE_PCI
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| 24 |
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| 25 | #define MICROS_TO_TICKS(m) (((m)*HZ/1000000)+1)
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| 26 |
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| 27 | PRIVATE struct pcitab
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| 28 | {
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| 29 | u16_t vid;
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| 30 | u16_t did;
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| 31 | int checkclass;
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| 32 | } pcitab[]=
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| 33 | {
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| 34 | { 0x10ec, 0x8029, 0 }, /* Realtek RTL8029 */
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| 35 |
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| 36 | { 0x0000, 0x0000, 0 }
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| 37 | };
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| 38 |
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| 39 | _PROTOTYPE( static void rtl_init, (struct dpeth *dep) );
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| 40 | _PROTOTYPE( static u16_t get_ee_word, (dpeth_t *dep, int a) );
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| 41 | _PROTOTYPE( static void ee_wen, (dpeth_t *dep) );
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| 42 | _PROTOTYPE( static void set_ee_word, (dpeth_t *dep, int a, U16_t w) );
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| 43 | _PROTOTYPE( static void ee_wds, (dpeth_t *dep) );
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| 44 | _PROTOTYPE( static void micro_delay, (unsigned long usecs) );
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| 45 |
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| 46 | PUBLIC int rtl_probe(dep)
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| 47 | struct dpeth *dep;
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| 48 | {
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| 49 | int i, r, devind, just_one;
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| 50 | u16_t vid, did;
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| 51 | u32_t bar;
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| 52 | u8_t ilr;
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| 53 | char *dname;
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| 54 |
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| 55 | pci_init();
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| 56 |
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| 57 | if ((dep->de_pcibus | dep->de_pcidev | dep->de_pcifunc) != 0)
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| 58 | {
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| 59 | /* Look for specific PCI device */
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| 60 | r= pci_find_dev(dep->de_pcibus, dep->de_pcidev,
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| 61 | dep->de_pcifunc, &devind);
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| 62 | if (r == 0)
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| 63 | {
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| 64 | printf("%s: no PCI found at %d.%d.%d\n",
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| 65 | dep->de_name, dep->de_pcibus,
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| 66 | dep->de_pcidev, dep->de_pcifunc);
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| 67 | return 0;
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| 68 | }
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| 69 | pci_ids(devind, &vid, &did);
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| 70 | just_one= TRUE;
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| 71 | }
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| 72 | else
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| 73 | {
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| 74 | r= pci_first_dev(&devind, &vid, &did);
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| 75 | if (r == 0)
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| 76 | return 0;
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| 77 | just_one= FALSE;
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| 78 | }
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| 79 |
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| 80 | for(;;)
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| 81 | {
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| 82 | for (i= 0; pcitab[i].vid != 0; i++)
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| 83 | {
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| 84 | if (pcitab[i].vid != vid)
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| 85 | continue;
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| 86 | if (pcitab[i].did != did)
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| 87 | continue;
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| 88 | if (pcitab[i].checkclass)
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| 89 | {
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| 90 | panic("",
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| 91 | "rtl_probe: class check not implemented",
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| 92 | NO_NUM);
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| 93 | }
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| 94 | break;
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| 95 | }
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| 96 | if (pcitab[i].vid != 0)
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| 97 | break;
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| 98 |
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| 99 | if (just_one)
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| 100 | {
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| 101 | printf(
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| 102 | "%s: wrong PCI device (%04X/%04X) found at %d.%d.%d\n",
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| 103 | dep->de_name, vid, did,
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| 104 | dep->de_pcibus,
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| 105 | dep->de_pcidev, dep->de_pcifunc);
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| 106 | return 0;
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| 107 | }
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| 108 |
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| 109 | r= pci_next_dev(&devind, &vid, &did);
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| 110 | if (!r)
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| 111 | return 0;
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| 112 | }
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| 113 |
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| 114 | dname= pci_dev_name(vid, did);
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| 115 | if (!dname)
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| 116 | dname= "unknown device";
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| 117 | printf("%s: %s (%04X/%04X) at %s\n",
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| 118 | dep->de_name, dname, vid, did, pci_slot_name(devind));
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| 119 | pci_reserve(devind);
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| 120 | /* printf("cr = 0x%x\n", pci_attr_r16(devind, PCI_CR)); */
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| 121 | bar= pci_attr_r32(devind, PCI_BAR) & 0xffffffe0;
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| 122 |
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| 123 | if (bar < 0x400)
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| 124 | panic("", "base address is not properly configured", NO_NUM);
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| 125 |
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| 126 | dep->de_base_port= bar;
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| 127 |
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| 128 | ilr= pci_attr_r8(devind, PCI_ILR);
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| 129 | dep->de_irq= ilr;
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| 130 | if (debug)
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| 131 | {
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| 132 | printf("%s: using I/O address 0x%lx, IRQ %d\n",
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| 133 | dep->de_name, (unsigned long)bar, ilr);
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| 134 | }
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| 135 | dep->de_initf= rtl_init;
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| 136 |
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| 137 | return TRUE;
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| 138 | }
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| 139 |
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| 140 | static void rtl_init(dep)
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| 141 | dpeth_t *dep;
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| 142 | {
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| 143 | u8_t reg_a, reg_b, cr, config0, config2, config3;
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| 144 | int i;
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| 145 |
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| 146 | #if DEBUG
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| 147 | printf("rtl_init called\n");
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| 148 | #endif
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| 149 | ne_init(dep);
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| 150 |
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| 151 | /* ID */
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| 152 | outb_reg0(dep, DP_CR, CR_PS_P0);
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| 153 | reg_a = inb_reg0(dep, DP_DUM1);
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| 154 | reg_b = inb_reg0(dep, DP_DUM2);
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| 155 |
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| 156 | #if DEBUG
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| 157 | printf("rtl_init: '%c', '%c'\n", reg_a, reg_b);
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| 158 | #endif
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| 159 |
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| 160 | outb_reg0(dep, DP_CR, CR_PS_P3);
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| 161 | config0 = inb_reg3(dep, 3);
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| 162 | config2 = inb_reg3(dep, 5);
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| 163 | config3 = inb_reg3(dep, 6);
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| 164 | outb_reg0(dep, DP_CR, CR_PS_P0);
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| 165 |
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| 166 | #if DEBUG
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| 167 | printf("rtl_init: config 0/2/3 = %x/%x/%x\n",
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| 168 | config0, config2, config3);
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| 169 | #endif
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| 170 |
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| 171 | if (getenv("RTL8029FD"))
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| 172 | {
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| 173 | printf("rtl_init: setting full-duplex mode\n");
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| 174 | outb_reg0(dep, DP_CR, CR_PS_P3);
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| 175 |
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| 176 | cr= inb_reg3(dep, 1);
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| 177 | outb_reg3(dep, 1, cr | 0xc0);
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| 178 |
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| 179 | outb_reg3(dep, 6, config3 | 0x40);
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| 180 | config3 = inb_reg3(dep, 6);
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| 181 |
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| 182 | config2= inb_reg3(dep, 5);
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| 183 | outb_reg3(dep, 5, config2 | 0x20);
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| 184 | config2= inb_reg3(dep, 5);
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| 185 |
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| 186 | outb_reg3(dep, 1, cr);
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| 187 |
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| 188 | outb_reg0(dep, DP_CR, CR_PS_P0);
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| 189 |
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| 190 | #if DEBUG
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| 191 | printf("rtl_init: config 2 = %x\n", config2);
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| 192 | printf("rtl_init: config 3 = %x\n", config3);
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| 193 | #endif
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| 194 | }
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| 195 |
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| 196 | #if DEBUG
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| 197 | for (i= 0; i<64; i++)
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| 198 | printf("%x ", get_ee_word(dep, i));
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| 199 | printf("\n");
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| 200 | #endif
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| 201 |
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| 202 | if (getenv("RTL8029MN"))
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| 203 | {
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| 204 | ee_wen(dep);
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| 205 |
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| 206 | set_ee_word(dep, 0x78/2, 0x10ec);
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| 207 | set_ee_word(dep, 0x7A/2, 0x8029);
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| 208 | set_ee_word(dep, 0x7C/2, 0x10ec);
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| 209 | set_ee_word(dep, 0x7E/2, 0x8029);
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| 210 |
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| 211 | ee_wds(dep);
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| 212 |
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| 213 | assert(get_ee_word(dep, 0x78/2) == 0x10ec);
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| 214 | assert(get_ee_word(dep, 0x7A/2) == 0x8029);
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| 215 | assert(get_ee_word(dep, 0x7C/2) == 0x10ec);
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| 216 | assert(get_ee_word(dep, 0x7E/2) == 0x8029);
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| 217 | }
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| 218 |
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| 219 | if (getenv("RTL8029XXX"))
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| 220 | {
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| 221 | ee_wen(dep);
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| 222 |
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| 223 | set_ee_word(dep, 0x76/2, 0x8029);
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| 224 |
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| 225 | ee_wds(dep);
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| 226 |
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| 227 | assert(get_ee_word(dep, 0x76/2) == 0x8029);
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| 228 | }
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| 229 | }
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| 230 |
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| 231 | static u16_t get_ee_word(dep, a)
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| 232 | dpeth_t *dep;
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| 233 | int a;
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| 234 | {
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| 235 | int b, i, cmd;
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| 236 | u16_t w;
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| 237 |
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| 238 | outb_reg0(dep, DP_CR, CR_PS_P3); /* Bank 3 */
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| 239 |
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| 240 | /* Switch to 9346 mode and enable CS */
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| 241 | outb_reg3(dep, 1, 0x80 | 0x8);
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| 242 |
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| 243 | cmd= 0x180 | (a & 0x3f); /* 1 1 0 a5 a4 a3 a2 a1 a0 */
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| 244 | for (i= 8; i >= 0; i--)
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| 245 | {
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| 246 | b= (cmd & (1 << i));
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| 247 | b= (b ? 2 : 0);
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| 248 |
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| 249 | /* Cmd goes out on the rising edge of the clock */
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| 250 | outb_reg3(dep, 1, 0x80 | 0x8 | b);
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| 251 | outb_reg3(dep, 1, 0x80 | 0x8 | 0x4 | b);
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| 252 | }
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| 253 | outb_reg3(dep, 1, 0x80 | 0x8); /* End of cmd */
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| 254 |
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| 255 | w= 0;
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| 256 | for (i= 0; i<16; i++)
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| 257 | {
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| 258 | w <<= 1;
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| 259 |
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| 260 | /* Data is shifted out on the rising edge. Read at the
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| 261 | * falling edge.
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| 262 | */
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| 263 | outb_reg3(dep, 1, 0x80 | 0x8 | 0x4);
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| 264 | outb_reg3(dep, 1, 0x80 | 0x8 | b);
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| 265 | b= inb_reg3(dep, 1);
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| 266 | w |= (b & 1);
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| 267 | }
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| 268 |
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| 269 | outb_reg3(dep, 1, 0x80); /* drop CS */
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| 270 | outb_reg3(dep, 1, 0x00); /* back to normal */
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| 271 | outb_reg0(dep, DP_CR, CR_PS_P0); /* back to bank 0 */
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| 272 |
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| 273 | return w;
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| 274 | }
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| 275 |
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| 276 | static void ee_wen(dep)
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| 277 | dpeth_t *dep;
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| 278 | {
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| 279 | int b, i, cmd;
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| 280 |
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| 281 | outb_reg0(dep, DP_CR, CR_PS_P3); /* Bank 3 */
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| 282 |
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| 283 | /* Switch to 9346 mode and enable CS */
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| 284 | outb_reg3(dep, 1, 0x80 | 0x8);
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| 285 |
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| 286 | cmd= 0x130; /* 1 0 0 1 1 x x x x */
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| 287 | for (i= 8; i >= 0; i--)
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| 288 | {
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| 289 | b= (cmd & (1 << i));
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| 290 | b= (b ? 2 : 0);
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| 291 |
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| 292 | /* Cmd goes out on the rising edge of the clock */
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| 293 | outb_reg3(dep, 1, 0x80 | 0x8 | b);
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| 294 | outb_reg3(dep, 1, 0x80 | 0x8 | 0x4 | b);
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| 295 | }
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| 296 | outb_reg3(dep, 1, 0x80 | 0x8); /* End of cmd */
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| 297 | outb_reg3(dep, 1, 0x80); /* Drop CS */
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| 298 | micro_delay(1); /* Is this required? */
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| 299 | }
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| 300 |
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| 301 | static void set_ee_word(dep, a, w)
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| 302 | dpeth_t *dep;
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| 303 | int a;
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| 304 | u16_t w;
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| 305 | {
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| 306 | int b, i, cmd;
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| 307 |
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| 308 | outb_reg3(dep, 1, 0x80 | 0x8); /* Set CS */
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| 309 |
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| 310 | cmd= 0x140 | (a & 0x3f); /* 1 0 1 a5 a4 a3 a2 a1 a0 */
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| 311 | for (i= 8; i >= 0; i--)
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| 312 | {
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| 313 | b= (cmd & (1 << i));
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| 314 | b= (b ? 2 : 0);
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| 315 |
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| 316 | /* Cmd goes out on the rising edge of the clock */
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| 317 | outb_reg3(dep, 1, 0x80 | 0x8 | b);
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| 318 | outb_reg3(dep, 1, 0x80 | 0x8 | 0x4 | b);
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| 319 | }
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| 320 | for (i= 15; i >= 0; i--)
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| 321 | {
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| 322 | b= (w & (1 << i));
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| 323 | b= (b ? 2 : 0);
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| 324 |
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| 325 | /* Cmd goes out on the rising edge of the clock */
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| 326 | outb_reg3(dep, 1, 0x80 | 0x8 | b);
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| 327 | outb_reg3(dep, 1, 0x80 | 0x8 | 0x4 | b);
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| 328 | }
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| 329 | outb_reg3(dep, 1, 0x80 | 0x8); /* End of data */
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| 330 | outb_reg3(dep, 1, 0x80); /* Drop CS */
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| 331 | micro_delay(1); /* Is this required? */
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| 332 | outb_reg3(dep, 1, 0x80 | 0x8); /* Set CS */
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| 333 | for (i= 0; i<10000; i++)
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| 334 | {
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| 335 | if (inb_reg3(dep, 1) & 1)
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| 336 | break;
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| 337 | micro_delay(1);
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| 338 | }
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| 339 | if (!(inb_reg3(dep, 1) & 1))
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| 340 | panic("", "set_ee_word: device remains busy", NO_NUM);
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| 341 | }
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| 342 |
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| 343 | static void ee_wds(dep)
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| 344 | dpeth_t *dep;
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| 345 | {
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| 346 | int b, i, cmd;
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| 347 |
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| 348 | outb_reg0(dep, DP_CR, CR_PS_P3); /* Bank 3 */
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| 349 |
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| 350 | /* Switch to 9346 mode and enable CS */
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| 351 | outb_reg3(dep, 1, 0x80 | 0x8);
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| 352 |
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| 353 | cmd= 0x100; /* 1 0 0 0 0 x x x x */
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| 354 | for (i= 8; i >= 0; i--)
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| 355 | {
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| 356 | b= (cmd & (1 << i));
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| 357 | b= (b ? 2 : 0);
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| 358 |
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| 359 | /* Cmd goes out on the rising edge of the clock */
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| 360 | outb_reg3(dep, 1, 0x80 | 0x8 | b);
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| 361 | outb_reg3(dep, 1, 0x80 | 0x8 | 0x4 | b);
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| 362 | }
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| 363 | outb_reg3(dep, 1, 0x80 | 0x8); /* End of cmd */
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| 364 | outb_reg3(dep, 1, 0x80); /* Drop CS */
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| 365 | outb_reg3(dep, 1, 0x00); /* back to normal */
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| 366 | outb_reg0(dep, DP_CR, CR_PS_P0); /* back to bank 0 */
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| 367 | }
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| 368 |
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| 369 | static void micro_delay(unsigned long usecs)
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| 370 | {
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| 371 | tickdelay(MICROS_TO_TICKS(usecs));
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| 372 | }
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| 373 |
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| 374 | #endif /* ENABLE_PCI */
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| 375 |
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| 376 | /*
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| 377 | * $PchId: rtl8029.c,v 1.7 2004/08/03 12:16:58 philip Exp $
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| 378 | */
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