1 | /*
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2 | ** File: 3c503.c Dec. 20, 1996
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3 | **
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4 | ** Author: Giovanni Falzoni <gfalzoni@inwind.it>
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5 | **
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6 | ** Driver for the Etherlink II boards. Works in shared memory mode.
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7 | ** Programmed I/O could be used as well but would result in poor
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8 | ** performances. This file contains only the board specific code,
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9 | ** the rest is in 8390.c Code specific for ISA bus only
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10 | **
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11 | ** $Id: 3c503.c,v 1.3 2005/08/05 19:08:43 beng Exp $
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12 | */
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13 |
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14 | #include "drivers.h"
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15 | #include <net/gen/ether.h>
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16 | #include <net/gen/eth_io.h>
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17 | #include "dp.h"
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18 |
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19 | #if (ENABLE_3C503 == 1)
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20 |
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21 | #include "8390.h"
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22 | #include "3c503.h"
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23 |
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24 | /*
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25 | ** Name: void el2_init(dpeth_t *dep);
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26 | ** Function: Initalize hardware and data structures.
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27 | */
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28 | static void el2_init(dpeth_t * dep)
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29 | {
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30 | int ix, irq;
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31 | int sendq_nr;
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32 | int cntr;
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33 |
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34 | /* Map the address PROM to lower I/O address range */
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35 | cntr = inb_el2(dep, EL2_CNTR);
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36 | outb_el2(dep, EL2_CNTR, cntr | ECNTR_SAPROM);
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37 |
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38 | /* Read station address from PROM */
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39 | for (ix = EL2_EA0; ix <= EL2_EA5; ix += 1)
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40 | dep->de_address.ea_addr[ix] = inb_el2(dep, ix);
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41 |
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42 | /* Map the 8390 back to lower I/O address range */
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43 | outb_el2(dep, EL2_CNTR, cntr);
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44 |
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45 | /* Enable memory, but turn off interrupts until we are ready */
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46 | outb_el2(dep, EL2_CFGR, ECFGR_IRQOFF);
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47 |
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48 | dep->de_data_port = dep->de_dp8390_port = dep->de_base_port;
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49 | dep->de_prog_IO = FALSE; /* Programmed I/O not yet available */
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50 |
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51 | /* Check width of data bus */
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52 | outb_el2(dep, DP_CR, CR_PS_P0 | CR_NO_DMA | CR_STP);
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53 | outb_el2(dep, DP_DCR, 0);
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54 | outb_el2(dep, DP_CR, CR_PS_P2 | CR_NO_DMA | CR_STP);
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55 | dep->de_16bit = (inb_el2(dep, DP_DCR) & DCR_WTS) != 0;
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56 | outb_el2(dep, DP_CR, CR_PS_P0 | CR_NO_DMA | CR_STP);
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57 |
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58 | /* Allocate one send buffer (1.5kb) per 8kb of on board memory. */
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59 | /* Only 8kb of 3c503/16 boards are used to avoid specific routines */
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60 | sendq_nr = dep->de_ramsize / 0x2000;
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61 | if (sendq_nr < 1)
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62 | sendq_nr = 1;
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63 | else if (sendq_nr > SENDQ_NR)
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64 | sendq_nr = SENDQ_NR;
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65 |
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66 | dep->de_sendq_nr = sendq_nr;
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67 | for (ix = 0; ix < sendq_nr; ix++)
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68 | dep->de_sendq[ix].sq_sendpage = (ix * SENDQ_PAGES) + EL2_SM_START_PG;
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69 |
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70 | dep->de_startpage = (ix * SENDQ_PAGES) + EL2_SM_START_PG;
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71 | dep->de_stoppage = EL2_SM_STOP_PG;
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72 |
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73 | outb_el2(dep, EL2_STARTPG, dep->de_startpage);
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74 | outb_el2(dep, EL2_STOPPG, dep->de_stoppage);
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75 |
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76 | /* Point the vector pointer registers somewhere ?harmless?. */
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77 | outb_el2(dep, EL2_VP2, 0xFF); /* Point at the ROM restart location */
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78 | outb_el2(dep, EL2_VP1, 0xFF); /* 0xFFFF:0000 (from original sources) */
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79 | outb_el2(dep, EL2_VP0, 0x00); /* - What for protected mode? */
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80 |
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81 | /* Set interrupt level for 3c503 */
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82 | irq = (dep->de_irq &= ~DEI_DEFAULT); /* Strip the default flag. */
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83 | if (irq == 9) irq = 2;
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84 | if (irq < 2 || irq > 5) panic(dep->de_name, "bad 3c503 irq configuration", irq);
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85 | outb_el2(dep, EL2_IDCFG, (0x04 << irq));
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86 |
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87 | outb_el2(dep, EL2_DRQCNT, 0x08); /* Set burst size to 8 */
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88 | outb_el2(dep, EL2_DMAAH, EL2_SM_START_PG); /* Put start of TX */
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89 | outb_el2(dep, EL2_DMAAL, 0x00); /* buffer in the GA DMA reg */
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90 |
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91 | outb_el2(dep, EL2_CFGR, ECFGR_NORM); /* Enable shared memory */
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92 |
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93 | ns_init(dep); /* Initialize DP controller */
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94 |
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95 | printf("%s: Etherlink II%s (%s) at %X:%d:%05lX - ",
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96 | dep->de_name, dep->de_16bit ? "/16" : "", "3c503",
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97 | dep->de_base_port, dep->de_irq,
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98 | dep->de_linmem + dep->de_offset_page);
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99 | for (ix = 0; ix < SA_ADDR_LEN; ix += 1)
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100 | printf("%02X%c", dep->de_address.ea_addr[ix],
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101 | ix < SA_ADDR_LEN - 1 ? ':' : '\n');
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102 | return;
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103 | }
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104 |
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105 | /*
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106 | ** Name: void el2_stop(dpeth_t *dep);
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107 | ** Function: Stops board by disabling interrupts.
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108 | */
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109 | static void el2_stop(dpeth_t * dep)
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110 | {
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111 |
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112 | outb_el2(dep, EL2_CFGR, ECFGR_IRQOFF);
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113 | sys_irqdisable(&dep->de_hook); /* disable interrupts */
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114 | return;
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115 | }
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116 |
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117 | /*
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118 | ** Name: void el2_probe(dpeth_t *dep);
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119 | ** Function: Probe for the presence of an EtherLink II card.
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120 | ** Initialize memory addressing if card detected.
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121 | */
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122 | int el2_probe(dpeth_t * dep)
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123 | {
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124 | int iobase, membase;
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125 | int thin;
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126 |
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127 | /* Thin ethernet or AUI? */
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128 | thin = (dep->de_linmem & 1) ? ECNTR_AUI : ECNTR_THIN;
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129 |
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130 | /* Location registers should have 1 bit set */
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131 | if (!(iobase = inb_el2(dep, EL2_IOBASE))) return FALSE;
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132 | if (!((membase = inb_el2(dep, EL2_MEMBASE)) & 0xF0)) return FALSE;
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133 | if ((iobase & (iobase - 1)) || (membase & (membase - 1))) return FALSE;
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134 |
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135 | /* Resets board */
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136 | outb_el2(dep, EL2_CNTR, ECNTR_RESET | thin);
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137 | milli_delay(1);
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138 | outb_el2(dep, EL2_CNTR, thin);
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139 | milli_delay(5);
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140 |
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141 | /* Map the address PROM to lower I/O address range */
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142 | outb_el2(dep, EL2_CNTR, ECNTR_SAPROM | thin);
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143 | if (inb_el2(dep, EL2_EA0) != 0x02 || /* Etherlink II Station address */
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144 | inb_el2(dep, EL2_EA1) != 0x60 || /* MUST be 02:60:8c:xx:xx:xx */
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145 | inb_el2(dep, EL2_EA2) != 0x8C)
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146 | return FALSE; /* No Etherlink board at this address */
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147 |
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148 | /* Map the 8390 back to lower I/O address range */
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149 | outb_el2(dep, EL2_CNTR, thin);
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150 |
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151 | /* Setup shared memory addressing for 3c503 */
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152 | dep->de_linmem = ((membase & 0xC0) ? EL2_BASE_0D8000 : EL2_BASE_0C8000) +
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153 | ((membase & 0xA0) ? (EL2_BASE_0CC000 - EL2_BASE_0C8000) : 0x0000);
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154 |
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155 | /* Shared memory starts at 0x2000 (8kb window) */
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156 | dep->de_offset_page = (EL2_SM_START_PG * DP_PAGESIZE);
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157 | dep->de_linmem -= dep->de_offset_page;
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158 | dep->de_ramsize = (EL2_SM_STOP_PG - EL2_SM_START_PG) * DP_PAGESIZE;
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159 |
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160 | /* Board initialization and stop functions */
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161 | dep->de_initf = el2_init;
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162 | dep->de_stopf = el2_stop;
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163 | return TRUE;
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164 | }
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165 | #endif /* ENABLE_3C503 */
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166 |
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167 | /** 3c503.c **/
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