[9] | 1 | /* Interrupt numbers and hardware vectors. */
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| 2 |
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| 3 | #ifndef _INTERRUPT_H
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| 4 | #define _INTERRUPT_H
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| 5 |
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| 6 | #if (CHIP == INTEL)
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| 7 |
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| 8 | /* 8259A interrupt controller ports. */
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| 9 | #define INT_CTL 0x20 /* I/O port for interrupt controller */
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| 10 | #define INT_CTLMASK 0x21 /* setting bits in this port disables ints */
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| 11 | #define INT2_CTL 0xA0 /* I/O port for second interrupt controller */
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| 12 | #define INT2_CTLMASK 0xA1 /* setting bits in this port disables ints */
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| 13 |
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| 14 | /* Magic numbers for interrupt controller. */
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| 15 | #define END_OF_INT 0x20 /* code used to re-enable after an interrupt */
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| 16 |
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| 17 | /* Interrupt vectors defined/reserved by processor. */
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| 18 | #define DIVIDE_VECTOR 0 /* divide error */
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| 19 | #define DEBUG_VECTOR 1 /* single step (trace) */
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| 20 | #define NMI_VECTOR 2 /* non-maskable interrupt */
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| 21 | #define BREAKPOINT_VECTOR 3 /* software breakpoint */
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| 22 | #define OVERFLOW_VECTOR 4 /* from INTO */
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| 23 |
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| 24 | /* Fixed system call vector. */
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| 25 | #define SYS_VECTOR 32 /* system calls are made with int SYSVEC */
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| 26 | #define SYS386_VECTOR 33 /* except 386 system calls use this */
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| 27 | #define LEVEL0_VECTOR 34 /* for execution of a function at level 0 */
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| 28 |
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| 29 | /* Suitable irq bases for hardware interrupts. Reprogram the 8259(s) from
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| 30 | * the PC BIOS defaults since the BIOS doesn't respect all the processor's
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| 31 | * reserved vectors (0 to 31).
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| 32 | */
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| 33 | #define BIOS_IRQ0_VEC 0x08 /* base of IRQ0-7 vectors used by BIOS */
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| 34 | #define BIOS_IRQ8_VEC 0x70 /* base of IRQ8-15 vectors used by BIOS */
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| 35 | #define IRQ0_VECTOR 0x50 /* nice vectors to relocate IRQ0-7 to */
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| 36 | #define IRQ8_VECTOR 0x70 /* no need to move IRQ8-15 */
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| 37 |
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| 38 | /* Hardware interrupt numbers. */
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| 39 | #define NR_IRQ_VECTORS 16
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| 40 | #define CLOCK_IRQ 0
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| 41 | #define KEYBOARD_IRQ 1
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| 42 | #define CASCADE_IRQ 2 /* cascade enable for 2nd AT controller */
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| 43 | #define ETHER_IRQ 3 /* default ethernet interrupt vector */
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| 44 | #define SECONDARY_IRQ 3 /* RS232 interrupt vector for port 2 */
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| 45 | #define RS232_IRQ 4 /* RS232 interrupt vector for port 1 */
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| 46 | #define XT_WINI_IRQ 5 /* xt winchester */
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| 47 | #define FLOPPY_IRQ 6 /* floppy disk */
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| 48 | #define PRINTER_IRQ 7
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| 49 | #define KBD_AUX_IRQ 12 /* AUX (PS/2 mouse) port in kbd controller */
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| 50 | #define AT_WINI_0_IRQ 14 /* at winchester controller 0 */
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| 51 | #define AT_WINI_1_IRQ 15 /* at winchester controller 1 */
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| 52 |
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| 53 | /* Interrupt number to hardware vector. */
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| 54 | #define BIOS_VECTOR(irq) \
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| 55 | (((irq) < 8 ? BIOS_IRQ0_VEC : BIOS_IRQ8_VEC) + ((irq) & 0x07))
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| 56 | #define VECTOR(irq) \
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| 57 | (((irq) < 8 ? IRQ0_VECTOR : IRQ8_VECTOR) + ((irq) & 0x07))
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| 58 |
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| 59 | #endif /* (CHIP == INTEL) */
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| 60 |
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| 61 | #endif /* _INTERRUPT_H */
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