[9] | 1 | /* This file contains routines for initializing the 8259 interrupt controller:
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| 2 | * put_irq_handler: register an interrupt handler
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| 3 | * rm_irq_handler: deregister an interrupt handler
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| 4 | * intr_handle: handle a hardware interrupt
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| 5 | * intr_init: initialize the interrupt controller(s)
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| 6 | */
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| 7 |
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| 8 | #include "kernel.h"
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| 9 | #include "proc.h"
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| 10 | #include <minix/com.h>
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| 11 |
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| 12 | #define ICW1_AT 0x11 /* edge triggered, cascade, need ICW4 */
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| 13 | #define ICW1_PC 0x13 /* edge triggered, no cascade, need ICW4 */
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| 14 | #define ICW1_PS 0x19 /* level triggered, cascade, need ICW4 */
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| 15 | #define ICW4_AT_SLAVE 0x01 /* not SFNM, not buffered, normal EOI, 8086 */
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| 16 | #define ICW4_AT_MASTER 0x05 /* not SFNM, not buffered, normal EOI, 8086 */
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| 17 | #define ICW4_PC_SLAVE 0x09 /* not SFNM, buffered, normal EOI, 8086 */
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| 18 | #define ICW4_PC_MASTER 0x0D /* not SFNM, buffered, normal EOI, 8086 */
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| 19 |
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| 20 | #if _WORD_SIZE == 2
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| 21 | typedef _PROTOTYPE( void (*vecaddr_t), (void) );
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| 22 |
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| 23 | FORWARD _PROTOTYPE( void set_vec, (int vec_nr, vecaddr_t addr) );
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| 24 |
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| 25 | PRIVATE vecaddr_t int_vec[] = {
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| 26 | int00, int01, int02, int03, int04, int05, int06, int07,
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| 27 | };
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| 28 |
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| 29 | PRIVATE vecaddr_t irq_vec[] = {
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| 30 | hwint00, hwint01, hwint02, hwint03, hwint04, hwint05, hwint06, hwint07,
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| 31 | hwint08, hwint09, hwint10, hwint11, hwint12, hwint13, hwint14, hwint15,
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| 32 | };
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| 33 | #else
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| 34 | #define set_vec(nr, addr) ((void)0)
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| 35 | #endif
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| 36 |
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| 37 | /*===========================================================================*
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| 38 | * intr_init *
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| 39 | *===========================================================================*/
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| 40 | PUBLIC void intr_init(mine)
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| 41 | int mine;
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| 42 | {
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| 43 | /* Initialize the 8259s, finishing with all interrupts disabled. This is
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| 44 | * only done in protected mode, in real mode we don't touch the 8259s, but
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| 45 | * use the BIOS locations instead. The flag "mine" is set if the 8259s are
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| 46 | * to be programmed for MINIX, or to be reset to what the BIOS expects.
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| 47 | */
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| 48 | int i;
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| 49 |
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| 50 | intr_disable();
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| 51 |
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| 52 | if (machine.prot) {
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| 53 | /* The AT and newer PS/2 have two interrupt controllers, one master,
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| 54 | * one slaved at IRQ 2. (We don't have to deal with the PC that
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| 55 | * has just one controller, because it must run in real mode.)
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| 56 | */
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| 57 | outb(INT_CTL, machine.ps_mca ? ICW1_PS : ICW1_AT);
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| 58 | outb(INT_CTLMASK, mine ? IRQ0_VECTOR : BIOS_IRQ0_VEC);
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| 59 | /* ICW2 for master */
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| 60 | outb(INT_CTLMASK, (1 << CASCADE_IRQ)); /* ICW3 tells slaves */
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| 61 | outb(INT_CTLMASK, ICW4_AT_MASTER);
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| 62 | outb(INT_CTLMASK, ~(1 << CASCADE_IRQ)); /* IRQ 0-7 mask */
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| 63 | outb(INT2_CTL, machine.ps_mca ? ICW1_PS : ICW1_AT);
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| 64 | outb(INT2_CTLMASK, mine ? IRQ8_VECTOR : BIOS_IRQ8_VEC);
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| 65 | /* ICW2 for slave */
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| 66 | outb(INT2_CTLMASK, CASCADE_IRQ); /* ICW3 is slave nr */
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| 67 | outb(INT2_CTLMASK, ICW4_AT_SLAVE);
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| 68 | outb(INT2_CTLMASK, ~0); /* IRQ 8-15 mask */
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| 69 |
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| 70 | /* Copy the BIOS vectors from the BIOS to the Minix location, so we
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| 71 | * can still make BIOS calls without reprogramming the i8259s.
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| 72 | */
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| 73 | #if IRQ0_VECTOR != BIOS_IRQ0_VEC
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| 74 | phys_copy(BIOS_VECTOR(0) * 4L, VECTOR(0) * 4L, 8 * 4L);
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| 75 | #endif
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| 76 | #if IRQ8_VECTOR != BIOS_IRQ8_VEC
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| 77 | phys_copy(BIOS_VECTOR(8) * 4L, VECTOR(8) * 4L, 8 * 4L);
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| 78 | #endif
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| 79 | } else {
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| 80 | /* Use the BIOS interrupt vectors in real mode. We only reprogram the
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| 81 | * exceptions here, the interrupt vectors are reprogrammed on demand.
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| 82 | * SYS_VECTOR is the Minix system call for message passing.
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| 83 | */
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| 84 | for (i = 0; i < 8; i++) set_vec(i, int_vec[i]);
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| 85 | set_vec(SYS_VECTOR, s_call);
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| 86 | }
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| 87 | }
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| 88 |
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| 89 | /*===========================================================================*
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| 90 | * put_irq_handler *
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| 91 | *===========================================================================*/
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| 92 | PUBLIC void put_irq_handler(hook, irq, handler)
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| 93 | irq_hook_t *hook;
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| 94 | int irq;
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| 95 | irq_handler_t handler;
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| 96 | {
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| 97 | /* Register an interrupt handler. */
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| 98 | int id;
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| 99 | irq_hook_t **line;
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| 100 |
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| 101 | if (irq < 0 || irq >= NR_IRQ_VECTORS)
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| 102 | panic("invalid call to put_irq_handler", irq);
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| 103 |
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| 104 | line = &irq_handlers[irq];
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| 105 | id = 1;
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| 106 | while (*line != NULL) {
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| 107 | if (hook == *line) return; /* extra initialization */
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| 108 | line = &(*line)->next;
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| 109 | id <<= 1;
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| 110 | }
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| 111 | if (id == 0) panic("Too many handlers for irq", irq);
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| 112 |
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| 113 | hook->next = NULL;
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| 114 | hook->handler = handler;
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| 115 | hook->irq = irq;
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| 116 | hook->id = id;
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| 117 | *line = hook;
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| 118 |
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| 119 | irq_use |= 1 << irq;
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| 120 | }
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| 121 |
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| 122 | /*===========================================================================*
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| 123 | * rm_irq_handler *
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| 124 | *===========================================================================*/
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| 125 | PUBLIC void rm_irq_handler(hook)
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| 126 | irq_hook_t *hook;
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| 127 | {
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| 128 | /* Unregister an interrupt handler. */
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| 129 | int irq = hook->irq;
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| 130 | int id = hook->id;
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| 131 | irq_hook_t **line;
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| 132 |
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| 133 | if (irq < 0 || irq >= NR_IRQ_VECTORS)
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| 134 | panic("invalid call to rm_irq_handler", irq);
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| 135 |
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| 136 | line = &irq_handlers[irq];
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| 137 | while (*line != NULL) {
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| 138 | if ((*line)->id == id) {
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| 139 | (*line) = (*line)->next;
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| 140 | if (! irq_handlers[irq]) irq_use &= ~(1 << irq);
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| 141 | return;
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| 142 | }
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| 143 | line = &(*line)->next;
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| 144 | }
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| 145 | /* When the handler is not found, normally return here. */
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| 146 | }
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| 147 |
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| 148 | /*===========================================================================*
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| 149 | * intr_handle *
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| 150 | *===========================================================================*/
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| 151 | PUBLIC void intr_handle(hook)
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| 152 | irq_hook_t *hook;
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| 153 | {
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| 154 | /* Call the interrupt handlers for an interrupt with the given hook list.
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| 155 | * The assembly part of the handler has already masked the IRQ, reenabled the
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| 156 | * controller(s) and enabled interrupts.
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| 157 | */
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| 158 |
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| 159 | /* Call list of handlers for an IRQ. */
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| 160 | while (hook != NULL) {
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| 161 | /* For each handler in the list, mark it active by setting its ID bit,
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| 162 | * call the function, and unmark it if the function returns true.
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| 163 | */
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| 164 | irq_actids[hook->irq] |= hook->id;
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| 165 | if ((*hook->handler)(hook)) irq_actids[hook->irq] &= ~hook->id;
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| 166 | hook = hook->next;
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| 167 | }
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| 168 |
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| 169 | /* The assembly code will now disable interrupts, unmask the IRQ if and only
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| 170 | * if all active ID bits are cleared, and restart a process.
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| 171 | */
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| 172 | }
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| 173 |
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| 174 | #if _WORD_SIZE == 2
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| 175 | /*===========================================================================*
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| 176 | * set_vec *
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| 177 | *===========================================================================*/
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| 178 | PRIVATE void set_vec(vec_nr, addr)
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| 179 | int vec_nr; /* which vector */
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| 180 | vecaddr_t addr; /* where to start */
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| 181 | {
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| 182 | /* Set up a real mode interrupt vector. */
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| 183 |
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| 184 | u16_t vec[2];
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| 185 |
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| 186 | /* Build the vector in the array 'vec'. */
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| 187 | vec[0] = (u16_t) addr;
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| 188 | vec[1] = (u16_t) physb_to_hclick(code_base);
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| 189 |
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| 190 | /* Copy the vector into place. */
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| 191 | phys_copy(vir2phys(vec), vec_nr * 4L, 4L);
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| 192 | }
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| 193 | #endif /* _WORD_SIZE == 2 */
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